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2022-09-30 - 18:54
/usr/bin/Xorg /usr/bin/Xorg

x86 Intel Atom Z530 @1600 MHz, Linux 3.12.61-rt81 (Profile)

Latency plot of system in rack #1, slot #8
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the highest latencies:
System rack1slot8.osadl.org (updated Fri Sep 30, 2022 12:43:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13940999694,927cyclictest0-21swapper/007:40:030
1394199940854,51cyclictest0-21swapper/107:10:081
1394099848764,55cyclictest0-21swapper/007:10:090
1394199830759,47cyclictest0-21swapper/107:40:021
136602809788,14sleep10-21swapper/107:07:411
124052603579,17sleep00-21swapper/007:05:100
211999860,4rtkit-daemon2118-21rtkit-daemon08:19:040
211999820,5rtkit-daemon2118-21rtkit-daemon11:09:220
1394199815,37cyclictest0-21swapper/107:20:241
211999800,4rtkit-daemon2118-21rtkit-daemon09:19:190
1394199805,33cyclictest0-21swapper/111:34:501
211999790,4rtkit-daemon2118-21rtkit-daemon07:35:140
1394199796,34cyclictest0-21swapper/111:10:581
211999780,4rtkit-daemon2118-21rtkit-daemon10:59:070
211999780,4rtkit-daemon2118-21rtkit-daemon10:51:220
211999780,4rtkit-daemon2118-21rtkit-daemon10:51:210
211999780,4rtkit-daemon2118-21rtkit-daemon10:19:160
13941997818,16cyclictest0-21swapper/111:52:351
1394199777,18cyclictest0-21swapper/112:29:351
1394199775,16cyclictest0-21swapper/111:57:531
13941997721,13cyclictest0-21swapper/110:54:481
13941997721,13cyclictest0-21swapper/110:54:471
13941997718,18cyclictest0-21swapper/109:51:431
13941997718,17cyclictest0-21swapper/111:29:441
13941997717,18cyclictest0-21swapper/108:55:231
13941997716,15cyclictest0-21swapper/110:30:151
1394199767,32cyclictest0-21swapper/110:47:431
1394199767,28cyclictest0-21swapper/109:59:451
1394199766,33cyclictest0-21swapper/110:55:401
1394199766,32cyclictest0-21swapper/111:44:311
1394199766,30cyclictest0-21swapper/110:39:231
1394199766,27cyclictest0-21swapper/109:12:591
1394199757,32cyclictest0-21swapper/112:39:591
1394199756,27cyclictest0-21swapper/109:37:421
1394199755,32cyclictest0-21swapper/112:08:231
1394199749,28cyclictest0-21swapper/107:50:131
1394199747,32cyclictest0-21swapper/107:48:171
1394199747,28cyclictest0-21swapper/110:29:121
1394199746,29cyclictest0-21swapper/111:08:441
1394199746,28cyclictest0-21swapper/111:37:161
1394199746,28cyclictest0-21swapper/109:46:151
1394199745,34cyclictest0-21swapper/112:32:121
1394199745,17cyclictest0-21swapper/110:18:041
13941997421,17cyclictest0-21swapper/107:55:191
13941997420,17cyclictest0-21swapper/111:01:401
1394199737,28cyclictest0-21swapper/111:15:431
1394199736,30cyclictest0-21swapper/110:24:401
1394199736,29cyclictest0-21swapper/109:25:201
1394199736,28cyclictest0-21swapper/110:10:371
1394199736,27cyclictest0-21swapper/112:21:441
1394199736,27cyclictest0-21swapper/108:25:121
1394199736,27cyclictest0-21swapper/107:35:281
1394199735,34cyclictest0-21swapper/112:03:001
1394199735,30cyclictest0-21swapper/109:22:011
1394199735,29cyclictest0-21swapper/109:44:531
1394199735,29cyclictest0-21swapper/109:44:521
1394199735,28cyclictest0-21swapper/109:00:161
13941997318,18cyclictest0-21swapper/110:05:131
13941997315,24cyclictest0-21swapper/110:40:231
13941997311,28cyclictest0-21swapper/109:30:201
1394199727,26cyclictest0-21swapper/108:40:241
1394199726,30cyclictest0-21swapper/108:00:231
1394199726,30cyclictest0-21swapper/108:00:221
1394199724,39cyclictest0-21swapper/108:33:371
1394199724,34cyclictest0-21swapper/108:23:491
1394199724,34cyclictest0-21swapper/108:23:491
1394199724,31cyclictest0-21swapper/111:49:561
13941997223,17cyclictest0-21swapper/108:15:271
13941997217,17cyclictest0-21swapper/109:15:271
1394199718,31cyclictest0-21swapper/107:30:291
1394199717,30cyclictest0-21swapper/107:15:231
1394199716,28cyclictest0-21swapper/110:02:051
1394199716,28cyclictest0-21swapper/108:10:151
1394199716,28cyclictest0-21swapper/108:10:141
1394199716,27cyclictest0-21swapper/112:18:031
1394199715,34cyclictest0-21swapper/112:10:191
13941997115,17cyclictest0-21swapper/108:35:241
211999700,4rtkit-daemon2118-21rtkit-daemon10:02:010
1394199706,30cyclictest0-21swapper/107:25:201
1394199706,27cyclictest0-21swapper/111:20:451
1394199706,27cyclictest0-21swapper/108:50:201
1394199706,27cyclictest0-21swapper/108:45:171
1394199696,28cyclictest0-21swapper/108:05:141
1394199696,17cyclictest0-21swapper/109:10:011
1394099665,44cyclictest0-21swapper/007:29:280
13940996511,34cyclictest0-21swapper/010:45:170
224042640,3sleep022402-21netstat10:05:220
211999640,4rtkit-daemon2118-21rtkit-daemon10:42:070
1394099645,44cyclictest0-21swapper/007:48:580
13940996314,42cyclictest0-21swapper/010:24:120
1394099626,34cyclictest0-21swapper/012:25:140
13940996223,21cyclictest0-21swapper/009:45:010
13940996223,21cyclictest0-21swapper/009:45:000
13940996223,19cyclictest0-21swapper/011:55:200
13940996217,27cyclictest0-21swapper/009:20:190
1394099618,46cyclictest0-21swapper/012:15:200
1394099617,36cyclictest0-21swapper/012:05:240
1394099615,40cyclictest0-21swapper/011:35:340
1394099614,51cyclictest0-21swapper/011:30:310
1394099614,51cyclictest0-21swapper/011:13:120
13940996132,24cyclictest0-21swapper/011:50:560
13940996125,30cyclictest0-21swapper/011:28:420
13940996114,40cyclictest0-21swapper/009:49:510
211999600,3rtkit-daemon2118-21rtkit-daemon07:22:140
211999600,20rtkit-daemon2118-21rtkit-daemon10:15:010
211999600,11rtkit-daemon0-21swapper/109:38:440
1394099608,44cyclictest0-21swapper/009:25:130
1394099606,46cyclictest0-21swapper/008:40:240
1394099604,50cyclictest0-21swapper/012:31:070
211999590,5rtkit-daemon2118-21rtkit-daemon10:37:020
211999590,3rtkit-daemon6675-21sh12:22:230
1394099596,46cyclictest0-21swapper/010:25:070
13940995932,21cyclictest0-21swapper/007:55:230
13940995927,26cyclictest0-21swapper/008:10:100
13940995927,26cyclictest0-21swapper/008:10:090
211999580,5rtkit-daemon2118-21rtkit-daemon08:04:240
211999580,5rtkit-daemon2118-21rtkit-daemon08:04:230
211999580,4rtkit-daemon1719-21df11:20:120
1394099586,44cyclictest0-21swapper/009:10:210
1394099585,46cyclictest0-21swapper/010:31:320
1394099585,34cyclictest0-21swapper/009:30:020
13940995820,17cyclictest0-21swapper/012:00:120
211999570,4rtkit-daemon2118-21rtkit-daemon07:52:290
1394099579,41cyclictest0-21swapper/011:41:230
1394099578,40cyclictest0-21swapper/008:20:250
1394099578,40cyclictest0-21swapper/008:20:240
1394099575,46cyclictest0-21swapper/009:05:110
13940995731,18cyclictest0-21swapper/008:55:240
13940995730,20cyclictest0-21swapper/012:36:480
211999560,4rtkit-daemon2118-21rtkit-daemon09:00:490
1394099566,28cyclictest0-21swapper/008:05:120
1394099565,44cyclictest0-21swapper/008:26:120
1394099564,45cyclictest0-21swapper/009:50:520
13940995634,16cyclictest0-21swapper/012:11:100
13940995632,17cyclictest0-21swapper/009:55:320
1394099556,43cyclictest0-21swapper/008:37:280
1394099554,45cyclictest0-21swapper/008:53:130
1394099545,42cyclictest0-21swapper/007:33:170
13940995431,16cyclictest0-21swapper/011:00:280
13940995430,17cyclictest0-21swapper/011:19:440
13940995423,17cyclictest0-21swapper/007:20:010
13940995412,34cyclictest0-21swapper/011:45:150
13940995228,17cyclictest0-21swapper/008:30:270
211999500,4rtkit-daemon2118-21rtkit-daemon08:47:580
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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