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2024-09-11 - 14:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot8.osadl.org (updated Wed Sep 11, 2024 12:43:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
83619918911817,39cyclictest22945-21strings09:15:220
836299458413,31cyclictest0-21swapper/109:15:211
836199396340,16cyclictest9178-21strings07:10:210
836299377328,25cyclictest0-21swapper/107:10:201
82762294271,16sleep00-21swapper/007:09:270
216899830,4rtkit-daemon2167-21rtkit-daemon11:08:541
216899790,4rtkit-daemon2167-21rtkit-daemon11:02:141
216899780,4rtkit-daemon2167-21rtkit-daemon09:26:221
216899750,4rtkit-daemon2167-21rtkit-daemon08:50:111
216899740,4rtkit-daemon2167-21rtkit-daemon12:21:411
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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