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2025-04-24 - 14:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack2slot0.osadl.org (updated Thu Apr 24, 2025 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
704821000,0sleep10-21swapper/109:32:171
309242890,0sleep20-21swapper/211:17:272
211942720,1sleep221190-21sshd12:13:272
49252580,1sleep34928-21bash11:02:463
102682580,0sleep30-21swapper/310:37:033
87742550,2sleep02321799cyclictest10:14:170
65862520,0sleep20-21swapper/211:58:572
256422520,0sleep20-21swapper/209:23:092
175142520,2sleep32323599cyclictest11:53:053
73292510,0sleep0111rcuc/010:29:230
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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