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2023-05-30 - 19:44

x86 Intel Xeon E3-1220 @3100 MHz, Linux 4.19.1-rt3 (Profile)

Latency plot of system in rack #2, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Tue May 30, 2023 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
111532620,0sleep0101ktimersoftd/007:10:240
251762560,0sleep20-21swapper/210:21:152
248052510,2sleep11079199cyclictest09:17:011
180622510,0sleep30-21swapper/309:39:343
70832500,1sleep1628-21gdbus09:12:411
242102500,0sleep30-21swapper/309:56:573
242102500,0sleep30-21swapper/309:56:573
312702490,0sleep20-21swapper/211:19:102
262162490,0sleep00-21swapper/011:41:590
69892480,0sleep30-21swapper/312:25:353
39662480,0sleep20-21swapper/211:52:382
144582470,0sleep10-21swapper/110:26:381
98632410,2sleep11079199cyclictest11:13:481
45662390,1sleep271550irq/25-eno1-tx-11:36:332
249802360,0sleep30-21swapper/310:21:123
1062923210,7sleep20-21swapper/207:09:222
103352308,7sleep30-21swapper/307:05:423
202372260,0sleep21079799cyclictest12:29:112
103552265,7sleep10-21swapper/107:05:571
1041822513,7sleep00-21swapper/007:06:440
222242200,0sleep30-21swapper/311:00:333
139582170,0sleep00-21swapper/009:14:320
11632170,0sleep30-21swapper/310:47:283
321772150,0sleep20-21swapper/211:27:192
42602140,0sleep10-21swapper/112:25:131
243222140,0sleep20-21swapper/210:05:132
10787991412,1cyclictest621-21dbus-daemon12:30:460
106692140,0sleep30-21swapper/310:57:523
55892130,0sleep10-21swapper/109:28:231
14712130,0sleep10-21swapper/112:32:261
1080499120,1cyclictest869-21sshd09:43:143
1080499120,1cyclictest581-17sedispatch10:52:453
1080499120,11cyclictest0-21swapper/309:51:053
1079799120,1cyclictest19833-21cstates07:30:162
1079799120,11cyclictest0-21swapper/210:51:472
1079199120,11cyclictest16940-21memory10:35:221
1078799120,11cyclictest25791-21sshd12:38:360
10804991110,0cyclictest0-21swapper/312:19:553
1080499110,10cyclictest0-21swapper/312:02:253
1080499110,10cyclictest0-21swapper/310:44:453
1080499110,10cyclictest0-21swapper/310:15:053
1079799110,1cyclictest27023-21lspci11:58:282
1079799110,1cyclictest15994-21bash11:31:182
1079799110,10cyclictest0-21swapper/212:23:282
1079799110,10cyclictest0-21swapper/209:55:072
1079799110,10cyclictest0-21swapper/209:55:072
1079799110,10cyclictest0-21swapper/209:31:372
10791991110,0cyclictest0-21swapper/111:15:021
1079199110,10cyclictest0-21swapper/109:43:321
1079199110,0cyclictest0-21swapper/112:13:121
1079199110,0cyclictest0-21swapper/112:03:331
1078799119,1cyclictest0-21swapper/012:05:060
10787991110,0cyclictest0-21swapper/011:04:160
1078799110,1cyclictest15092-21sshd10:50:460
1078799110,10cyclictest19510-21sshd11:08:060
1078799110,10cyclictest0-21swapper/011:50:160
1078799110,10cyclictest0-21swapper/011:26:270
1078799110,10cyclictest0-21swapper/010:35:360
1078799110,10cyclictest0-21swapper/009:33:260
1078799110,0cyclictest0-21swapper/011:16:360
229382108,0sleep10-21swapper/111:33:121
1080499109,0cyclictest0-21swapper/311:21:353
1080499109,0cyclictest0-21swapper/310:36:453
1080499109,0cyclictest0-21swapper/308:49:343
1080499100,9cyclictest0-21swapper/308:37:333
1080499100,9cyclictest0-21swapper/308:22:343
1080499100,0cyclictest0-21swapper/311:47:363
1080499100,0cyclictest0-21swapper/311:05:253
1080499100,0cyclictest0-21swapper/307:42:343
1079799109,0cyclictest0-21swapper/212:36:392
1079799109,0cyclictest0-21swapper/212:12:492
1079799109,0cyclictest0-21swapper/212:09:282
1079799109,0cyclictest0-21swapper/210:10:272
1079799109,0cyclictest0-21swapper/209:54:172
1079799108,1cyclictest7729-21systemd-cgroups11:05:172
1079799100,0cyclictest0-21swapper/212:18:082
1079799100,0cyclictest0-21swapper/211:21:272
1079799100,0cyclictest0-21swapper/211:13:472
1079799100,0cyclictest0-21swapper/210:42:572
1079799100,0cyclictest0-21swapper/209:44:472
1079199109,0cyclictest0-21swapper/110:16:121
1079199108,1cyclictest6677-21sshd09:36:321
1079199108,1cyclictest23094-21sshd10:45:021
1079199100,0cyclictest0-21swapper/112:23:521
1079199100,0cyclictest0-21swapper/112:09:021
1079199100,0cyclictest0-21swapper/110:24:521
1079199100,0cyclictest0-21swapper/109:53:521
1078799109,0cyclictest0-21swapper/010:43:360
1078799109,0cyclictest0-21swapper/010:23:260
1078799109,0cyclictest0-21swapper/010:14:460
1078799100,9cyclictest0-21swapper/011:45:360
1078799100,0cyclictest9751-21sshd12:18:260
1078799100,0cyclictest0-21swapper/009:39:360
7470290,1sleep111495-21gdbus09:20:381
108049998,0cyclictest0-21swapper/312:14:363
108049998,0cyclictest0-21swapper/311:57:453
108049998,0cyclictest0-21swapper/311:31:253
108049998,0cyclictest0-21swapper/311:18:353
108049990,0cyclictest0-21swapper/307:23:343
107979998,0cyclictest0-21swapper/211:49:082
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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