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2021-10-17 - 05:13

Intel(R) Xeon(R) CPU E31220 @ 3.10GHz, Linux 4.19.1-rt3 (Profile)

Latency plot of system in rack #2, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack2slot0.osadl.org (updated Sun Oct 17, 2021 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
79672560,0sleep00-21swapper/000:23:100
181052550,0sleep10-21swapper/100:09:461
111432510,0sleep30-21swapper/323:43:443
160812500,0sleep20-21swapper/221:27:552
60462490,0sleep00-21swapper/023:50:230
42432490,0sleep30-21swapper/323:50:103
294932470,0sleep00-21swapper/023:48:180
194772460,0sleep30-21swapper/321:44:593
251342450,0sleep1231rcuc/121:30:141
253642360,1sleep025359-21bash23:55:190
227602309,7sleep00-21swapper/019:09:050
2259523018,7sleep20-21swapper/219:07:022
224662308,7sleep30-21swapper/319:05:273
2282322412,7sleep10-21swapper/119:09:541
21722170,0sleep10-21swapper/122:45:041
156642160,1sleep2311rcuc/221:51:502
156102160,0sleep30-21swapper/322:15:543
2296399149,4cyclictest26537-21bash22:10:322
21062140,0sleep10-21swapper/123:09:141
177222140,0sleep30-21swapper/322:00:243
57892130,0sleep10-21swapper/123:10:111
306222130,0sleep30-21swapper/322:35:453
262222130,0sleep20-21swapper/222:59:062
2297199130,10cyclictest0-21swapper/323:15:403
2297199130,10cyclictest0-21swapper/322:27:203
22956991312,0cyclictest14878-21lspci23:28:311
2295699130,11cyclictest4101-21sshd22:29:261
212122130,0sleep10-21swapper/122:09:311
194462130,0sleep00-21swapper/022:33:090
2297199128,1cyclictest20129-21bash23:37:513
2296399120,2cyclictest614-21dbus-daemon23:32:002
22956991210,1cyclictest0-21swapper/121:20:461
22948991210,1cyclictest0-21swapper/000:18:290
2297199119,1cyclictest21069-21sshd21:21:013
2297199110,10cyclictest0-21swapper/323:31:003
2297199110,10cyclictest0-21swapper/322:42:203
2297199110,10cyclictest0-21swapper/320:10:213
2297199110,0cyclictest0-21swapper/300:00:313
2296399115,5cyclictest598-21avahi-daemon23:27:012
2296399115,5cyclictest598-21avahi-daemon23:11:292
2296399115,5cyclictest598-21avahi-daemon22:45:582
2296399115,5cyclictest598-21avahi-daemon22:35:432
2296399115,5cyclictest598-21avahi-daemon21:20:392
2296399114,6cyclictest614-21dbus-daemon00:15:182
2296399114,6cyclictest598-21avahi-daemon23:39:562
2296399114,6cyclictest13904-21sshd23:44:292
2296399112,1cyclictest12109-21bash22:07:032
2296399110,1cyclictest0-21swapper/222:16:322
2296399110,10cyclictest0-21swapper/223:02:522
2296399110,10cyclictest0-21swapper/221:30:422
2296399110,10cyclictest0-21swapper/221:19:122
2296399110,10cyclictest0-21swapper/221:19:112
2295699119,1cyclictest0-21swapper/120:25:261
2295699110,10cyclictest0-21swapper/123:59:451
2295699110,10cyclictest0-21swapper/123:44:261
22948991110,0cyclictest0-21swapper/021:43:480
2294899110,10cyclictest0-21swapper/023:33:590
2294899110,10cyclictest0-21swapper/022:55:180
2294899110,10cyclictest0-21swapper/022:29:290
2294899110,0cyclictest0-21swapper/021:10:580
2297199109,0cyclictest0-21swapper/321:48:213
2297199100,0cyclictest0-21swapper/323:06:103
2297199100,0cyclictest0-21swapper/322:51:303
2297199100,0cyclictest0-21swapper/321:58:013
2296399109,0cyclictest0-21swapper/222:44:412
2296399109,0cyclictest0-21swapper/221:46:322
2296399109,0cyclictest0-21swapper/221:10:322
2296399109,0cyclictest0-21swapper/200:20:412
2296399108,1cyclictest0-21swapper/220:45:222
2296399107,2cyclictest0-21swapper/223:17:222
2296399106,3cyclictest0-21swapper/222:53:522
2296399105,4cyclictest598-21avahi-daemon21:57:002
2296399105,4cyclictest0-21swapper/223:09:012
2296399104,5cyclictest968-21sshd21:38:272
2296399104,5cyclictest633-21polkitd23:56:412
2296399104,5cyclictest614-21dbus-daemon23:21:222
2296399104,5cyclictest614-21dbus-daemon00:39:272
2296399104,5cyclictest598-21avahi-daemon22:32:522
2296399104,5cyclictest598-21avahi-daemon00:05:392
2296399104,5cyclictest16446-21sshd00:01:012
2296399103,2cyclictest970-21snmpd00:11:272
2296399103,2cyclictest614-21dbus-daemon22:25:162
2296399103,2cyclictest614-21dbus-daemon21:41:292
2296399100,0cyclictest0-21swapper/223:51:322
2296399100,0cyclictest0-21swapper/223:48:222
2295699109,0cyclictest0-21swapper/122:30:351
2295699109,0cyclictest0-21swapper/119:40:251
2295699109,0cyclictest0-21swapper/100:33:461
2295699109,0cyclictest0-21swapper/100:10:161
2295699100,0cyclictest0-21swapper/123:23:051
2295699100,0cyclictest0-21swapper/100:15:061
2294899109,0cyclictest0-21swapper/022:38:090
2294899109,0cyclictest0-21swapper/021:56:380
2294899109,0cyclictest0-21swapper/021:51:490
2294899109,0cyclictest0-21swapper/021:46:190
2294899109,0cyclictest0-21swapper/021:26:190
2294899108,1cyclictest24637-21lspci22:10:190
2294899108,1cyclictest0-21swapper/000:26:190
2294899100,0cyclictest0-21swapper/022:51:190
2294899100,0cyclictest0-21swapper/022:02:390
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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