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2023-02-06 - 13:26

x86 Intel Xeon E3-1220 @3100 MHz, Linux 4.19.1-rt3 (Profile)

Latency plot of system in rack #2, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack2slot0.osadl.org (updated Mon Feb 06, 2023 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
101642610,2sleep02865699cyclictest00:16:320
281882580,0sleep20-21swapper/223:40:212
80352540,0sleep00-21swapper/021:24:500
41322520,0sleep10-21swapper/122:28:561
210392520,0sleep00-21swapper/023:38:420
2829925140,6sleep20-21swapper/219:06:462
154992500,0sleep30-21swapper/321:50:453
99142480,0sleep30-21swapper/300:32:493
242882460,0sleep10-21swapper/122:01:081
148202410,2sleep12866099cyclictest22:47:541
266142390,0sleep2321ktimersoftd/200:36:562
2818823832,3sleep10-21swapper/119:05:251
2653023731,3sleep00-21swapper/019:05:000
125762350,0sleep10-21swapper/121:25:401
285292286,7sleep30-21swapper/319:09:413
11072190,0sleep20-21swapper/200:22:262
253502180,0sleep30-21swapper/300:04:173
69532170,0sleep30-21swapper/322:54:133
138992170,0sleep013900-21latency19:50:170
318312150,0sleep30-21swapper/321:55:093
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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