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2022-05-26 - 19:16

x86 Intel Xeon E3-1220 @3100 MHz, Linux 4.19.1-rt3 (Profile)

Latency plot of system in rack #2, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack2slot0.osadl.org (updated Thu May 26, 2022 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
86252840,0sleep20-21swapper/210:51:352
183872550,4sleep10-21swapper/109:34:201
157632540,0sleep30-21swapper/310:29:383
136082530,0sleep10-21swapper/110:29:041
77572520,0sleep00-21swapper/012:35:370
283212510,1sleep328324-21bash10:32:333
58462490,0sleep20-21swapper/209:23:132
39262490,1sleep1231rcuc/111:06:241
211312490,1sleep021081-21sshd10:15:010
152982490,0sleep30-21swapper/312:29:483
265262470,0sleep30-21swapper/310:40:103
3126424029,7sleep20-21swapper/207:08:352
3007323421,7sleep10-21swapper/107:05:141
3133423220,7sleep30-21swapper/307:09:293
3133622514,7sleep00-21swapper/007:09:290
31484991615,0cyclictest3379-21lspci11:38:330
31484991515,0cyclictest30478-21kworker/0:110:23:250
272692150,0sleep327272-21gltestperf10:00:263
31484991413,0cyclictest9192-21kworker/0:011:51:490
31484991413,0cyclictest32651-21kworker/0:010:30:500
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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