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2023-01-28 - 08:46

x86 Intel Celeron M @1500 MHz, Linux 3.2.39-rt59 (Profile)

Latency plot of system in rack #2, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the highest latencies:
System rack2slot6.osadl.org (updated Sat Jan 28, 2023 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
311560ksoftirqd/01955-21ps13:19:550
311500ksoftirqd/025672-21threads13:09:570
311220ksoftirqd/02894-21threads14:34:540
31134995428cyclictest0-21swapper14:09:380
31134995231cyclictest0-21swapper14:23:250
31134995227cyclictest0-21swapper13:55:320
31134995025cyclictest0-21swapper15:07:460
31134994915cyclictest18800-21kworker/0:014:49:340
31134994911cyclictest0-21swapper13:46:300
3113499489cyclictest0-21swapper12:17:070
31134994814cyclictest18800-21kworker/0:014:33:340
31134994813cyclictest18731-21kworker/0:112:22:420
3113499479cyclictest0-21swapper12:36:560
31134994727cyclictest0-21swapper13:59:360
31134994716cyclictest18800-21kworker/0:013:50:430
31134994716cyclictest18731-21kworker/0:113:07:020
31134994712cyclictest18731-21kworker/0:112:01:150
31134994710cyclictest18731-21kworker/0:111:54:500
31134994710cyclictest18731-21kworker/0:111:46:470
3113499469cyclictest0-21swapper14:41:190
3113499469cyclictest0-21swapper11:42:260
31134994632cyclictest0-21swapper15:00:080
31134994629cyclictest18800-21kworker/0:013:39:500
31134994617cyclictest0-21swapper12:46:510
31134994614cyclictest18731-21kworker/0:112:06:360
31134994613cyclictest18800-21kworker/0:014:25:000
31134994610cyclictest0-21swapper14:15:130
31134994610cyclictest0-21swapper13:33:570
31134994610cyclictest0-21swapper12:44:260
31134994610cyclictest0-21swapper12:30:110
31134994610cyclictest0-21swapper12:24:410
3113499459cyclictest0-21swapper14:56:340
3113499459cyclictest0-21swapper14:07:100
31134994522cyclictest0-21swapper12:56:270
31134994515cyclictest18731-21kworker/0:113:37:350
31134994515cyclictest18731-21kworker/0:113:04:300
31134994514cyclictest18731-21kworker/0:113:18:240
31134994510cyclictest0-21swapper14:45:330
31134994510cyclictest0-21swapper13:24:490
31134994510cyclictest0-21swapper12:14:320
31134994414cyclictest18731-21kworker/0:111:51:130
31134994410cyclictest0-21swapper12:49:390
31134993519cyclictest4755-21irqstats09:55:050
31134993517cyclictest406750irq/9-eth210:05:130
31134993510cyclictest5011-21munin-node11:24:560
31134993424cyclictest10421-21munin-run11:39:410
31134993418cyclictest406750irq/9-eth210:34:580
31134993410cyclictest31ksoftirqd/010:00:010
3113499339cyclictest31ksoftirqd/010:31:070
3113499339cyclictest2542-21munin-node09:50:040
3113499339cyclictest24510-21munin-node10:50:010
3113499339cyclictest0-21swapper09:45:400
31134993322cyclictest1140-21ntpd11:10:010
31134993313cyclictest0-21swapper10:15:010
31134993311cyclictest23894-21chrt10:46:500
31134993311cyclictest0-21swapper11:20:250
31134993311cyclictest0-21swapper11:01:150
31134993311cyclictest0-21swapper10:20:120
31134993310cyclictest0-21swapper11:30:330
31134993310cyclictest0-21swapper11:08:480
31134993214cyclictest0-21swapper11:14:570
31134993210cyclictest31211-21munin-node09:40:010
31134993210cyclictest31ksoftirqd/010:12:260
31134993210cyclictest0-21swapper10:54:510
31134993210cyclictest0-21swapper10:40:340
31134993210cyclictest0-21swapper10:25:190
31134992511cyclictest31136-21latency_hist09:39:490
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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