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2021-05-12 - 14:10

Intel(R) Celeron(R) M processor 1.50GHz, Linux 3.2.39-rt59 (Profile)

Latency plot of system in rack #2, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the highest latencies:
System rack2slot6.osadl.org (updated Wed May 12, 2021 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31760ksoftirqd/012474-21ls19:22:560
6960995431cyclictest18032-21kworker/0:019:39:080
6960995027cyclictest0-21swapper17:56:440
6960995024cyclictest0-21swapper17:25:040
6960995010cyclictest0-21swapper16:47:480
6960994926cyclictest0-21swapper17:49:400
6960994924cyclictest0-21swapper16:42:000
6960994921cyclictest15415-21munin-node18:13:050
6960994831cyclictest0-21swapper16:56:370
6960994830cyclictest0-21swapper17:47:000
6960994824cyclictest0-21swapper19:49:110
6960994815cyclictest30978-21kworker/0:216:52:080
6960994810cyclictest0-21swapper19:12:120
6960994729cyclictest0-21swapper18:19:590
6960994723cyclictest0-21swapper18:23:220
6960994715cyclictest3008-21kworker/0:117:33:200
6960994713cyclictest3008-21kworker/0:117:28:320
6960994713cyclictest19420-21kworker/0:118:29:260
6960994710cyclictest0-21swapper18:51:370
696099469cyclictest0-21swapper19:21:320
696099469cyclictest0-21swapper18:05:060
696099469cyclictest0-21swapper17:41:540
6960994628cyclictest30978-21kworker/0:216:37:490
6960994624cyclictest0-21swapper17:22:280
6960994615cyclictest18032-21kworker/0:019:47:250
6960994615cyclictest18032-21kworker/0:018:55:440
6960994614cyclictest18032-21kworker/0:019:33:560
6960994613cyclictest6131-21kworker/0:018:10:270
6960994613cyclictest30978-21kworker/0:217:06:540
6960994613cyclictest18032-21kworker/0:019:04:330
6960994612cyclictest18032-21kworker/0:019:12:510
6960994610cyclictest0-21swapper19:54:440
6960994610cyclictest0-21swapper18:02:060
696099459cyclictest0-21swapper18:43:450
696099459cyclictest0-21swapper16:29:410
6960994528cyclictest0-21swapper17:00:490
6960994516cyclictest30978-21kworker/0:217:08:120
6960994514cyclictest18032-21kworker/0:019:01:510
6960994513cyclictest18032-21kworker/0:019:29:010
6960994510cyclictest0-21swapper18:34:500
6960994414cyclictest30978-21kworker/0:217:13:030
6960994311cyclictest0-21swapper18:39:150
696099369cyclictest31ksoftirqd/015:23:050
696099359cyclictest31ksoftirqd/014:29:210
6960993511cyclictest19822-21munin-node15:03:150
6960993510cyclictest5763-21munin-node15:53:100
6960993510cyclictest31ksoftirqd/015:44:460
696099349cyclictest31ksoftirqd/016:15:340
696099349cyclictest31ksoftirqd/016:09:020
696099349cyclictest31ksoftirqd/016:03:280
696099349cyclictest31ksoftirqd/015:20:450
696099349cyclictest31ksoftirqd/015:14:040
696099349cyclictest31ksoftirqd/014:55:510
696099349cyclictest31ksoftirqd/014:52:510
6960993425cyclictest30978-21kworker/0:216:27:530
6960993412cyclictest847-13audispd14:39:400
6960993410cyclictest31ksoftirqd/014:58:010
696099338cyclictest31ksoftirqd/015:42:560
6960993312cyclictest0-21swapper14:43:280
6960993311cyclictest0-21swapper15:50:470
6960993311cyclictest0-21swapper14:33:340
6960993310cyclictest31ksoftirqd/015:58:290
6960993310cyclictest0-21swapper16:19:410
6960993310cyclictest0-21swapper15:28:550
6960993310cyclictest0-21swapper15:08:320
6960993211cyclictest0-21swapper15:32:580
6960992310cyclictest6950-21munin-run14:28:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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