You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2023-02-06 - 23:05

x86 Intel Celeron M @1500 MHz, Linux 3.2.39-rt59 (Profile)

Latency plot of system in rack #2, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack2slot6.osadl.org (updated Mon Feb 06, 2023 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
404995229cyclictest0-21swapper00:51:140
404995131cyclictest0-21swapper02:19:040
404995127cyclictest0-21swapper23:31:110
404995030cyclictest0-21swapper23:41:500
404994814cyclictest21792-21kworker/0:201:48:220
404994814cyclictest18187-21kworker/0:000:24:080
404994810cyclictest0-21swapper00:45:020
404994723cyclictest0-21swapper02:20:450
404994715cyclictest21792-21kworker/0:201:37:300
404994713cyclictest18187-21kworker/0:023:36:340
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional