You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2023-02-07 - 18:13

x86 Intel Celeron M @1500 MHz, Linux 3.2.39-rt59 (Profile)

Latency plot of system in rack #2, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100, Linux 4.9.20-rt16, x86_64 highest latencies:
System rack2slot6.osadl.org (updated Tue Feb 07, 2023 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
406750590irq/9-eth227329-21kworker/0:201:46:490
17855995225cyclictest0-21swapper02:16:130
17855995025cyclictest0-21swapper02:19:570
17855994929cyclictest0-21swapper02:30:380
17855994915cyclictest27329-21kworker/0:223:34:290
17855994914cyclictest27329-21kworker/0:202:23:260
17855994828cyclictest0-21swapper23:26:490
17855994827cyclictest27329-21kworker/0:201:06:230
17855994814cyclictest27329-21kworker/0:201:56:530
17855994813cyclictest27329-21kworker/0:200:14:140
17855994729cyclictest0-21swapper02:00:550
17855994728cyclictest0-21swapper00:09:430
17855994727cyclictest0-21swapper02:36:000
17855994714cyclictest27329-21kworker/0:202:41:080
17855994713cyclictest27329-21kworker/0:201:15:480
17855994711cyclictest27329-21kworker/0:223:51:050
17855994710cyclictest0-21swapper01:18:150
17855994710cyclictest0-21swapper00:58:520
1785599469cyclictest0-21swapper23:45:190
1785599469cyclictest0-21swapper01:10:190
17855994631cyclictest0-21swapper00:54:060
17855994631cyclictest0-21swapper00:01:440
17855994614cyclictest27329-21kworker/0:200:22:490
17855994613cyclictest27329-21kworker/0:223:40:000
17855994612cyclictest27329-21kworker/0:201:25:360
17855994610cyclictest0-21swapper23:57:090
17855994610cyclictest0-21swapper01:29:300
1785599459cyclictest0-21swapper01:37:490
1785599459cyclictest0-21swapper00:18:590
17855994515cyclictest27329-21kworker/0:200:38:140
17855994515cyclictest27329-21kworker/0:200:31:230
17855994514cyclictest27329-21kworker/0:202:46:390
17855994514cyclictest27329-21kworker/0:201:35:480
17855994513cyclictest27329-21kworker/0:202:08:010
17855994513cyclictest27329-21kworker/0:202:06:250
17855994512cyclictest27329-21kworker/0:201:48:470
17855994512cyclictest27329-21kworker/0:200:43:340
17855994510cyclictest0-21swapper23:32:400
17855994510cyclictest0-21swapper00:36:520
17855994510cyclictest0-21swapper00:03:170
17855994415cyclictest27329-21kworker/0:202:48:380
17855994414cyclictest27329-21kworker/0:200:47:430
17855993720cyclictest0-21swapper22:14:200
17855993710cyclictest0-21swapper21:35:200
1785599359cyclictest16754-21munin-node22:48:070
17855993512cyclictest5766-21munin-node22:18:090
17855993510cyclictest19790-21munin-node21:28:120
1785599349cyclictest31ksoftirqd/022:58:330
1785599349cyclictest31ksoftirqd/021:38:060
1785599349cyclictest0-21swapper23:04:540
17855993410cyclictest32593-21munin-node22:03:070
17855993410cyclictest0-21swapper22:34:260
1785599339cyclictest0-21swapper23:11:010
17855993323cyclictest26293-21irqstats23:13:080
17855993313cyclictest30773-21munin-node21:58:120
17855993311cyclictest0-21swapper22:46:390
17855993311cyclictest0-21swapper22:29:500
17855993311cyclictest0-21swapper22:08:040
17855993311cyclictest0-21swapper21:23:370
17855993310cyclictest27105-21munin-node21:48:090
17855993310cyclictest17853-21cyclictest22:41:000
17855993310cyclictest0-21swapper21:43:320
1785599329cyclictest27763-21munin-node23:18:100
1785599329cyclictest0-21swapper22:22:510
17855993210cyclictest0-21swapper22:52:520
17855993210cyclictest0-21swapper21:55:130
17855992910cyclictest17864-21ls21:22:530
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional