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2022-10-04 - 08:56

x86 Intel Celeron M @1500 MHz, Linux 3.2.39-rt59 (Profile)

Latency plot of system in rack #2, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack2slot6.osadl.org (updated Tue Oct 04, 2022 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19555995527cyclictest0-21swapper16:57:490
19555995426cyclictest0-21swapper16:41:060
19555995325cyclictest0-21swapper17:44:500
19555995227cyclictest0-21swapper17:18:130
19555995111cyclictest0-21swapper16:45:590
19555995026cyclictest0-21swapper16:27:570
19555994932cyclictest0-21swapper16:16:500
19555994932cyclictest0-21swapper14:48:580
19555994925cyclictest0-21swapper15:28:200
19555994915cyclictest18101-21kworker/0:217:07:590
19555994819cyclictest0-21swapper17:36:290
19555994816cyclictest18101-21kworker/0:217:23:100
19555994815cyclictest26861-21kworker/0:015:44:050
19555994727cyclictest0-21swapper15:13:520
19555994713cyclictest19296-21kworker/0:115:58:250
19555994711cyclictest0-21swapper14:52:580
19555994710cyclictest0-21swapper16:05:550
19555994710cyclictest0-21swapper15:26:080
1955599469cyclictest0-21swapper17:50:520
1955599469cyclictest0-21swapper16:53:500
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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