You are here: Home / Projects / QA Farm Realtime / Latency plots / 
2021-10-24 - 01:58

Intel(R) Celeron(R) M processor 1.50GHz, Linux 3.2.39-rt59 (Profile)

Latency plot of system in rack #2, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack2slot6.osadl.org (updated Sun Oct 24, 2021 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30500995726cyclictest0-21swapper00:29:330
30500995127cyclictest0-21swapper02:10:090
30500995022cyclictest0-21swapper02:21:050
30500994930cyclictest0-21swapper00:20:060
30500994915cyclictest23435-21kworker/0:100:53:010
30500994826cyclictest0-21swapper02:51:060
30500994825cyclictest0-21swapper01:37:220
30500994810cyclictest0-21swapper00:04:000
30500994729cyclictest0-21swapper02:56:540
30500994728cyclictest0-21swapper02:03:110
30500994727cyclictest0-21swapper01:02:140
30500994726cyclictest0-21swapper03:20:320
30500994726cyclictest0-21swapper02:30:060
30500994714cyclictest23435-21kworker/0:100:34:190
3050099469cyclictest17339-21seq02:01:320
3050099469cyclictest0-21swapper03:30:550
3050099469cyclictest0-21swapper03:11:510
3050099469cyclictest0-21swapper01:51:030
3050099469cyclictest0-21swapper00:48:070
30500994625cyclictest0-21swapper02:12:560
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional