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2023-01-29 - 03:37

x86 Intel Celeron M @1500 MHz, Linux 3.2.39-rt59 (Profile)

Latency plot of system in rack #2, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack2slot6.osadl.org (updated Sun Jan 29, 2023 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
311120ksoftirqd/031856-21ps14:13:210
13554995329cyclictest14132-21munin-node13:53:140
13554995326cyclictest0-21swapper13:51:190
13554995324cyclictest0-21swapper12:46:480
13554995234cyclictest0-21swapper13:22:030
13554995221cyclictest20656-21df_abs14:38:090
13554995132cyclictest0-21swapper12:00:570
13554995131cyclictest0-21swapper12:11:540
13554995130cyclictest0-21swapper14:56:430
13554995125cyclictest0-21swapper12:39:040
13554995124cyclictest0-21swapper11:42:540
13554995123cyclictest0-21swapper13:47:250
13554995030cyclictest0-21swapper12:32:040
13554995024cyclictest0-21swapper11:53:280
13554994931cyclictest0-21swapper14:51:160
13554994931cyclictest0-21swapper14:05:000
13554994931cyclictest0-21swapper13:39:550
13554994931cyclictest0-21swapper13:16:550
13554994931cyclictest0-21swapper11:46:130
13554994930cyclictest0-21swapper14:44:470
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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