You are here: Home / Projects / QA Farm Realtime / Latency plots / 
2021-07-26 - 18:45

Intel(R) Celeron(R) M processor 1.50GHz, Linux 3.2.39-rt59 (Profile)

Latency plot of system in rack #2, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack2slot6.osadl.org (updated Mon Jul 26, 2021 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30454995119cyclictest293762sleep015:25:420
30454995028cyclictest0-21swapper15:20:320
30454995028cyclictest0-21swapper15:13:080
30454994923cyclictest0-21swapper14:55:510
30454994913cyclictest2868-21kworker/0:216:52:040
3045499489cyclictest0-21swapper17:53:280
3045499489cyclictest0-21swapper16:32:140
30454994827cyclictest0-21swapper14:58:060
30454994824cyclictest0-21swapper16:26:560
30454994810cyclictest0-21swapper17:24:410
3045499479cyclictest0-21swapper16:05:570
3045499479cyclictest0-21swapper15:57:190
30454994731cyclictest406750irq/9-eth216:17:110
30454994714cyclictest2868-21kworker/0:217:08:090
30454994713cyclictest2868-21kworker/0:217:49:010
30454994713cyclictest2868-21kworker/0:216:57:120
30454994710cyclictest0-21swapper14:37:440
3045499469cyclictest0-21swapper16:43:270
3045499469cyclictest0-21swapper16:22:340
3045499469cyclictest0-21swapper15:48:310
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional