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2023-01-30 - 05:29

x86 Intel Celeron M @1500 MHz, Linux 3.2.39-rt59 (Profile)

Latency plot of system in rack #2, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack2slot6.osadl.org (updated Mon Jan 30, 2023 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
311640ksoftirqd/019858-21threads12:06:510
13253996415cyclictest0-21swapper14:53:030
13253996410cyclictest0-21swapper13:13:410
13253996314cyclictest19187-21kworker/0:213:45:070
13253996311cyclictest0-21swapper14:36:340
13253996214cyclictest19187-21kworker/0:214:35:130
13253996213cyclictest19187-21kworker/0:213:10:110
13253996115cyclictest1254-21kworker/0:111:49:470
13253996115cyclictest0-21swapper12:47:180
13253996114cyclictest19187-21kworker/0:214:14:090
13253996114cyclictest19187-21kworker/0:213:48:270
13253996114cyclictest19187-21kworker/0:213:17:010
13253996114cyclictest0-21swapper14:05:250
13253996114cyclictest0-21swapper12:43:540
13253996112cyclictest19187-21kworker/0:212:26:190
1325399609cyclictest0-21swapper14:57:490
1325399609cyclictest0-21swapper14:17:290
13253996015cyclictest19187-21kworker/0:214:29:360
13253996014cyclictest19187-21kworker/0:215:01:580
13253996013cyclictest19187-21kworker/0:214:23:110
13253996013cyclictest19187-21kworker/0:213:38:460
13253996010cyclictest25765-21proc_pri11:36:500
1325399599cyclictest0-21swapper13:34:180
13253995915cyclictest0-21swapper12:35:010
13253995914cyclictest19187-21kworker/0:213:23:210
13253995914cyclictest19187-21kworker/0:212:57:140
13253995914cyclictest19187-21kworker/0:212:31:110
13253995914cyclictest1254-21kworker/0:111:56:520
13253995913cyclictest19187-21kworker/0:214:08:470
13253995913cyclictest19187-21kworker/0:212:19:120
13253995913cyclictest19187-21kworker/0:212:11:480
13253995912cyclictest19187-21kworker/0:213:58:090
13253995910cyclictest0-21swapper14:43:280
13253995910cyclictest0-21swapper13:05:400
13253995910cyclictest0-21swapper12:38:550
1325399589cyclictest0-21swapper13:52:300
1325399589cyclictest0-21swapper13:30:240
1325399589cyclictest0-21swapper12:05:100
1325399588cyclictest0-21swapper11:44:020
13253995810cyclictest0-21swapper11:52:010
13253995715cyclictest0-21swapper14:48:090
13253995710cyclictest0-21swapper12:52:280
1325399469cyclictest0-21swapper10:11:280
1325399449cyclictest0-21swapper10:53:160
1325399449cyclictest0-21swapper10:50:190
1325399449cyclictest0-21swapper10:03:050
13253994321cyclictest13244-21cyclictest11:26:570
1325399429cyclictest0-21swapper09:48:060
1325399428cyclictest0-21swapper11:12:310
1325399419cyclictest0-21swapper10:21:480
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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