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2022-06-27 - 16:30

x86 Intel Celeron M @1500 MHz, Linux 3.2.39-rt59 (Profile)

Latency plot of system in rack #2, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack2slot6.osadl.org (updated Mon Jun 27, 2022 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19999995527cyclictest8885-21kworker/0:206:22:300
19999995432cyclictest0-21swapper06:39:450
19999995327cyclictest0-21swapper05:48:110
19999995212cyclictest8826-21kworker/0:108:25:050
19999995124cyclictest0-21swapper07:51:210
19999995115cyclictest8885-21kworker/0:206:48:430
19999995033cyclictest0-21swapper08:52:410
19999995029cyclictest0-21swapper06:33:310
19999995027cyclictest8826-21kworker/0:107:37:090
19999994915cyclictest8826-21kworker/0:107:59:570
19999994914cyclictest8826-21kworker/0:108:18:450
19999994829cyclictest0-21swapper08:12:540
19999994828cyclictest0-21swapper07:49:240
19999994722cyclictest0-21swapper05:51:090
19999994715cyclictest8826-21kworker/0:107:31:070
19999994714cyclictest8826-21kworker/0:108:01:220
19999994711cyclictest3437-21ls06:05:550
19999994711cyclictest0-21swapper06:00:470
19999994710cyclictest0-21swapper08:35:360
1999999469cyclictest0-21swapper08:41:080
1999999469cyclictest0-21swapper07:28:560
1999999469cyclictest0-21swapper05:32:100
19999994626cyclictest406750irq/9-eth207:18:170
19999994616cyclictest8885-21kworker/0:206:44:590
19999994616cyclictest8885-21kworker/0:206:19:220
19999994616cyclictest8885-21kworker/0:206:11:150
19999994614cyclictest8885-21kworker/0:207:14:000
19999994613cyclictest8885-21kworker/0:207:23:050
19999994613cyclictest8885-21kworker/0:206:52:510
19999994613cyclictest8885-21kworker/0:205:38:070
19999994612cyclictest8885-21kworker/0:206:56:260
19999994612cyclictest8885-21kworker/0:206:29:590
19999994612cyclictest8826-21kworker/0:108:31:100
19999994610cyclictest0-21swapper07:44:350
1999999459cyclictest0-21swapper08:27:020
19999994515cyclictest8885-21kworker/0:207:08:500
19999994515cyclictest8885-21kworker/0:207:02:240
19999994515cyclictest8885-21kworker/0:205:29:540
19999994510cyclictest0-21swapper08:06:590
19999994510cyclictest0-21swapper05:56:560
1999999449cyclictest0-21swapper05:42:400
19999994414cyclictest8826-21kworker/0:108:45:330
19999993913cyclictest8885-21kworker/0:205:25:310
19999993610cyclictest0-21swapper05:03:140
19999993510cyclictest24323-21munin-node05:05:520
19999993424cyclictest0-21swapper05:15:500
19999993411cyclictest0-21swapper03:35:580
19999993410cyclictest0-21swapper03:25:420
19999993311cyclictest0-21swapper04:04:220
19999993221cyclictest163812sleep004:42:420
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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