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2022-09-30 - 14:59
/usr/bin/Xorg /usr/bin/Xorg

x86 Intel Core2 Quad @2400 MHz, Linux 3.2.46-rt67-32 (Profile)

Latency plot of system in rack #3, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot1.osadl.org (updated Fri Sep 30, 2022 12:43:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1684199114113cyclictest0-21swapper/305:23:253
1683099108106cyclictest8010-21tune2fs05:38:172
1683099106102cyclictest0-21swapper/205:34:582
1683099106102cyclictest0-21swapper/205:01:472
1683099104102cyclictest4238-21tune2fs04:13:192
1683099104102cyclictest22359-21tune2fs07:28:142
1683099104102cyclictest13663-21tune2fs08:23:122
1684199103102cyclictest0-21swapper/307:28:143
1684199103102cyclictest0-21swapper/305:38:173
1684199103102cyclictest0-21swapper/305:18:173
16830999792cyclictest0-21swapper/208:08:192
16830999792cyclictest0-21swapper/205:43:252
16830999792cyclictest0-21swapper/205:08:272
16830999692cyclictest0-21swapper/207:45:212
16841999392cyclictest0-21swapper/308:28:233
16841999392cyclictest0-21swapper/305:48:153
16841999392cyclictest0-21swapper/304:58:233
16841999391cyclictest26020-21sed06:18:283
16830999392cyclictest26019-21grep06:18:282
16830999392cyclictest0-21swapper/204:28:242
16830998982cyclictest3248-21tune2fs06:43:142
16830998982cyclictest14010-21tune2fs07:08:142
16830998882cyclictest0-21swapper/208:53:122
16830998881cyclictest7751-21tune2fs06:53:142
16830998881cyclictest3693-21tune2fs05:28:182
16830998881cyclictest26647-21tune2fs07:38:112
16830998881cyclictest15040-21tune2fs04:38:202
16830998881cyclictest0-21swapper/205:23:272
16830998871cyclictest0-21swapper/204:33:222
16830998782cyclictest0-21swapper/207:53:182
16830998782cyclictest0-21swapper/207:50:052
16830998782cyclictest0-21swapper/207:33:102
16830998782cyclictest0-21swapper/207:07:082
16830998782cyclictest0-21swapper/206:48:122
16830998782cyclictest0-21swapper/206:38:202
16830998782cyclictest0-21swapper/206:00:372
16830998782cyclictest0-21swapper/205:22:312
16830998782cyclictest0-21swapper/204:23:052
16830998782cyclictest0-21swapper/203:46:422
16830998782cyclictest0-21swapper/203:38:292
16830998771cyclictest0-21swapper/206:28:162
16830998771cyclictest0-21swapper/203:48:222
16830998682cyclictest0-21swapper/208:48:072
16830998682cyclictest0-21swapper/208:43:192
16830998682cyclictest0-21swapper/208:38:172
16830998682cyclictest0-21swapper/208:33:082
16830998682cyclictest0-21swapper/208:32:552
16830998682cyclictest0-21swapper/208:03:132
16830998682cyclictest0-21swapper/208:02:172
16830998682cyclictest0-21swapper/207:13:142
16830998682cyclictest0-21swapper/206:23:162
16830998682cyclictest0-21swapper/206:13:182
16830998682cyclictest0-21swapper/206:13:002
16830998682cyclictest0-21swapper/206:03:162
16830998682cyclictest0-21swapper/205:48:192
16830998682cyclictest0-21swapper/205:03:192
16830998682cyclictest0-21swapper/204:48:202
16830998682cyclictest0-21swapper/204:43:162
16830998682cyclictest0-21swapper/204:23:172
16830998682cyclictest0-21swapper/204:08:212
16830998682cyclictest0-21swapper/204:03:062
16830998682cyclictest0-21swapper/203:53:262
16830998682cyclictest0-21swapper/203:33:292
16830998671cyclictest0-21swapper/208:18:082
16830998671cyclictest0-21swapper/208:13:192
16830998671cyclictest0-21swapper/208:13:192
16830998671cyclictest0-21swapper/207:18:142
16830998671cyclictest0-21swapper/203:28:202
16830998661cyclictest0-21swapper/207:23:572
16830998561cyclictest0-21swapper/206:33:082
16830998482cyclictest29891-21tune2fs05:13:192
16841998382cyclictest0-21swapper/308:38:133
16841998382cyclictest0-21swapper/308:23:193
16841998382cyclictest0-21swapper/308:18:553
16841998382cyclictest0-21swapper/308:08:153
16841998382cyclictest0-21swapper/308:02:173
16841998382cyclictest0-21swapper/307:57:163
16841998382cyclictest0-21swapper/306:33:223
16841998382cyclictest0-21swapper/306:28:243
16841998382cyclictest0-21swapper/306:06:563
16841998382cyclictest0-21swapper/305:48:023
16841998382cyclictest0-21swapper/305:33:243
16841998382cyclictest0-21swapper/305:28:193
16841998382cyclictest0-21swapper/304:58:033
16841998382cyclictest0-21swapper/304:48:263
16841998382cyclictest0-21swapper/304:18:053
16841998382cyclictest0-21swapper/304:08:273
16841998382cyclictest0-21swapper/303:43:243
16841998382cyclictest0-21swapper/303:33:293
16841998382cyclictest0-21swapper/303:28:313
16841998381cyclictest9171-21tune2fs08:13:113
16841998381cyclictest9171-21tune2fs08:13:113
16830998382cyclictest21339-21tune2fs04:53:182
16841998281cyclictest484-21kjournald08:47:553
16841998281cyclictest0-21swapper/308:53:083
16841998281cyclictest0-21swapper/308:48:093
16841998281cyclictest0-21swapper/308:03:103
16841998281cyclictest0-21swapper/307:33:113
16841998281cyclictest0-21swapper/307:08:153
16841998281cyclictest0-21swapper/306:53:133
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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