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2022-06-30 - 19:48

x86 Intel Core2 Quad @2400 MHz, Linux 3.2.46-rt67-32 (Profile)

Latency plot of system in rack #3, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100, Linux 4.9.20-rt16, x86_64 highest latencies:
System rack3slot1.osadl.org (updated Thu Jun 30, 2022 12:43:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1833399107102cyclictest0-21swapper/308:16:293
1833399103102cyclictest0-21swapper/309:41:263
1832399103102cyclictest22328-21tune2fs07:31:292
1832399103102cyclictest17314-21tune2fs09:51:282
18333999897cyclictest0-21swapper/306:21:323
18323999392cyclictest0-21swapper/205:11:222
18333998882cyclictest8846-21sed05:41:423
18333998872cyclictest0-21swapper/305:11:383
18333998782cyclictest0-21swapper/310:16:313
18333998782cyclictest0-21swapper/310:01:323
18333998780cyclictest0-21swapper/305:01:363
18333998771cyclictest0-21swapper/305:51:343
18333998682cyclictest0-21swapper/309:11:293
18333998682cyclictest0-21swapper/309:06:333
18333998682cyclictest0-21swapper/308:11:383
18333998682cyclictest0-21swapper/307:11:183
18333998682cyclictest0-21swapper/306:49:273
18333998682cyclictest0-21swapper/306:06:403
18333998682cyclictest0-21swapper/305:16:413
18333998682cyclictest0-21swapper/304:56:423
18333998682cyclictest0-21swapper/304:51:433
18333998682cyclictest0-21swapper/304:51:433
18333998681cyclictest0-21swapper/309:01:263
18333998680cyclictest0-21swapper/308:31:283
18333998582cyclictest0-21swapper/309:34:513
18333998571cyclictest0-21swapper/309:51:353
18323998483cyclictest417-21munin-node06:41:352
18323998483cyclictest0-21swapper/205:41:202
18323998482cyclictest4334-21tune2fs09:21:252
18323998482cyclictest27374-21tune2fs05:11:342
18323998482cyclictest22724-21tune2fs06:16:362
18323998482cyclictest20696-21tune2fs06:11:322
18333998382cyclictest0-21swapper/310:11:323
18333998382cyclictest0-21swapper/309:56:283
18333998382cyclictest0-21swapper/309:46:343
18333998382cyclictest0-21swapper/309:29:513
18333998382cyclictest0-21swapper/309:16:333
18333998382cyclictest0-21swapper/308:21:373
18333998382cyclictest0-21swapper/307:46:403
18333998382cyclictest0-21swapper/307:41:363
18333998382cyclictest0-21swapper/307:31:273
18333998382cyclictest0-21swapper/307:09:303
18333998382cyclictest0-21swapper/307:06:183
18333998382cyclictest0-21swapper/305:56:323
18333998382cyclictest0-21swapper/305:46:403
18333998382cyclictest0-21swapper/305:39:173
18333998382cyclictest0-21swapper/305:29:153
18333998382cyclictest0-21swapper/305:26:213
18333998382cyclictest0-21swapper/305:09:123
18333998376cyclictest0-21swapper/309:21:333
18323998382cyclictest0-21swapper/210:06:312
18323998382cyclictest0-21swapper/210:01:312
18323998382cyclictest0-21swapper/209:41:262
18323998382cyclictest0-21swapper/209:31:282
18323998382cyclictest0-21swapper/208:51:332
18323998382cyclictest0-21swapper/208:49:452
18323998382cyclictest0-21swapper/208:41:332
18323998382cyclictest0-21swapper/208:31:352
18323998382cyclictest0-21swapper/208:16:292
18323998382cyclictest0-21swapper/208:06:352
18323998382cyclictest0-21swapper/207:51:352
18323998382cyclictest0-21swapper/207:49:362
18323998382cyclictest0-21swapper/207:41:292
18323998382cyclictest0-21swapper/207:36:382
18323998382cyclictest0-21swapper/207:26:372
18323998382cyclictest0-21swapper/207:21:372
18323998382cyclictest0-21swapper/207:16:392
18323998382cyclictest0-21swapper/207:11:412
18323998382cyclictest0-21swapper/207:06:402
18323998382cyclictest0-21swapper/206:59:282
18323998382cyclictest0-21swapper/206:46:422
18323998382cyclictest0-21swapper/206:36:382
18323998382cyclictest0-21swapper/206:31:392
18323998382cyclictest0-21swapper/206:11:202
18323998382cyclictest0-21swapper/205:56:392
18323998382cyclictest0-21swapper/205:51:412
18323998382cyclictest0-21swapper/205:26:402
18323998381cyclictest26849-21tune2fs06:26:322
18323998381cyclictest26312-21tune2fs08:56:272
18323998381cyclictest19266-21tune2fs09:56:242
18323998381cyclictest18998-21tune2fs04:51:362
18323998381cyclictest18998-21tune2fs04:51:362
18323998381cyclictest17482-21tune2fs08:36:262
18323998381cyclictest17482-21tune2fs08:36:262
18333998281cyclictest0-21swapper/308:06:283
18333998281cyclictest0-21swapper/306:41:313
18323998271cyclictest0-21swapper/209:39:522
18323998271cyclictest0-21swapper/207:01:392
18333997772cyclictest0-21swapper/307:36:163
18333997772cyclictest0-21swapper/306:06:203
18333997672cyclictest0-21swapper/310:06:213
18333997672cyclictest0-21swapper/307:21:273
18323997672cyclictest0-21swapper/209:51:112
18333997473cyclictest0-21swapper/308:01:323
18333997472cyclictest0-21swapper/309:36:253
18333997372cyclictest0-21swapper/308:41:243
18333997372cyclictest0-21swapper/308:36:303
18333997372cyclictest0-21swapper/308:36:303
18333997372cyclictest0-21swapper/308:29:513
18333997372cyclictest0-21swapper/307:56:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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