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2022-05-28 - 15:39

x86 Intel Core2 Quad @2400 MHz, Linux 3.2.46-rt67-32 (Profile)

Latency plot of system in rack #3, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot1.osadl.org (updated Sat May 28, 2022 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
961999103102cyclictest0-21swapper/210:21:032
9620999392cyclictest0-21swapper/310:21:033
9620999392cyclictest0-21swapper/305:31:283
9620999172cyclictest0-21swapper/305:44:043
9620999072cyclictest0-21swapper/307:40:583
9620999072cyclictest0-21swapper/306:47:523
9620998972cyclictest0-21swapper/305:21:283
9620998971cyclictest0-21swapper/306:24:123
9620998872cyclictest0-21swapper/309:31:053
9620998872cyclictest0-21swapper/308:50:373
9620998872cyclictest0-21swapper/308:50:373
9620998872cyclictest0-21swapper/306:11:323
9620998872cyclictest0-21swapper/305:46:363
9620998872cyclictest0-21swapper/305:30:243
9620998782cyclictest9616-21cyclictest08:26:073
9620998782cyclictest0-21swapper/306:06:293
9620998782cyclictest0-21swapper/305:36:283
9620998781cyclictest1452-17auditd09:36:043
9620998772cyclictest0-21swapper/310:51:023
9620998772cyclictest0-21swapper/310:41:033
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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