You are here: Home / Projects / QA Farm Realtime / Latency plots / 
2019-07-23 - 11:21

Intel(R) Core(TM)2 Quad CPU @ 2.40GHz, Linux 3.2.46-rt67-32 (Profile)

Latency plot of system in rack #3, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot1.osadl.org (updated Tue Jul 23, 2019 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
482199180cyclictest0-21swapper/022:41:240
482199180cyclictest0-21swapper/017:45:100
482199170cyclictest0-21swapper/021:40:290
4829991610cyclictest16120-21fschecks_count18:10:101
482199160cyclictest0-21swapper/021:05:140
482199160cyclictest0-21swapper/020:46:330
482199160cyclictest0-21swapper/020:09:260
482199160cyclictest0-21swapper/018:39:480
482199160cyclictest0-21swapper/018:26:480
482199160cyclictest0-21swapper/018:12:270
482199150cyclictest0-21swapper/023:00:040
482199150cyclictest0-21swapper/022:21:550
482199150cyclictest0-21swapper/021:57:400
482199150cyclictest0-21swapper/020:14:020
482199150cyclictest0-21swapper/019:50:050
482199150cyclictest0-21swapper/019:26:340
482199150cyclictest0-21swapper/019:12:460
482199150cyclictest0-21swapper/018:46:550
482199140cyclictest0-21swapper/023:10:050
482199140cyclictest0-21swapper/023:08:290
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional