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2024-09-07 - 16:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot1.osadl.org (updated Sat Sep 07, 2024 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1563899123122cyclictest0-21swapper/305:58:593
1563699109102cyclictest13027-21sed06:09:071
1563899104103cyclictest0-21swapper/306:34:043
1563899103102cyclictest19368-21unixbench_multi03:54:113
1563899103102cyclictest0-21swapper/305:53:593
1563899103102cyclictest0-21swapper/304:54:023
1563899103102cyclictest0-21swapper/304:54:023
1563699103102cyclictest11997-21tune2fs04:54:021
1563699103102cyclictest11997-21tune2fs04:54:021
15638999492cyclictest0-21swapper/306:09:073
15638999392cyclictest0-21swapper/306:49:113
15636999083cyclictest23092-21tune2fs09:03:511
15638998876cyclictest0-21swapper/307:32:083
15636998881cyclictest5632-21tune2fs08:23:511
15636998782cyclictest0-21swapper/109:13:531
15636998782cyclictest0-21swapper/107:52:111
15636998782cyclictest0-21swapper/107:34:021
15636998782cyclictest0-21swapper/106:54:041
15636998782cyclictest0-21swapper/105:34:051
15636998771cyclictest0-21swapper/107:14:191
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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