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2025-07-12 - 10:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot1.osadl.org (updated Sat Jul 12, 2025 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
993599104102cyclictest2082-21tune2fs15:50:311
993599104102cyclictest2082-21tune2fs15:50:311
994299103102cyclictest0-21swapper/315:50:313
994299103102cyclictest0-21swapper/315:50:313
9935998482cyclictest23737-21tune2fs15:25:291
9942998382cyclictest0-21swapper/316:20:273
9942998382cyclictest0-21swapper/315:40:153
9942998382cyclictest0-21swapper/313:55:443
9942998382cyclictest0-21swapper/313:20:483
9942998382cyclictest0-21swapper/313:20:483
9935998382cyclictest0-21swapper/115:40:151
9935998382cyclictest0-21swapper/114:20:331
9935998382cyclictest0-21swapper/113:20:481
9935998382cyclictest0-21swapper/113:20:481
9935998381cyclictest4252-21tune2fs14:40:341
9935998381cyclictest25773-21tune2fs13:00:371
9935998381cyclictest25773-21tune2fs13:00:371
9935998381cyclictest21411-21tune2fs11:35:391
9935998381cyclictest17168-21tune2fs15:10:341
9935998381cyclictest17042-21tune2fs12:40:381
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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