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2025-07-05 - 10:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot1.osadl.org (updated Sat Jul 05, 2025 00:43:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
87649910892cyclictest0-21swapper/315:41:543
876499107102cyclictest0-21swapper/315:47:003
876499107102cyclictest0-21swapper/312:36:593
876499107102cyclictest0-21swapper/312:31:583
876499107102cyclictest0-21swapper/311:51:563
876299104102cyclictest13605-21tune2fs11:26:591
8764999782cyclictest0-21swapper/315:21:363
8764999392cyclictest0-21swapper/316:41:483
8764999392cyclictest0-21swapper/316:36:543
8764999392cyclictest0-21swapper/316:16:523
8764999392cyclictest0-21swapper/316:11:493
8764999392cyclictest0-21swapper/316:01:523
8764999392cyclictest0-21swapper/315:51:493
8764999392cyclictest0-21swapper/315:26:513
8764999392cyclictest0-21swapper/315:06:503
8764999392cyclictest0-21swapper/314:06:533
8764999392cyclictest0-21swapper/314:01:563
8764999392cyclictest0-21swapper/313:56:543
8764999392cyclictest0-21swapper/313:51:553
8764999392cyclictest0-21swapper/312:56:583
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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