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2024-10-03 - 18:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack3slot1.osadl.org (updated Thu Oct 03, 2024 12:43:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2858699113112cyclictest0-21swapper/306:55:253
2856399109102cyclictest27235-21tune2fs07:05:221
2856399109102cyclictest20594-21tune2fs05:35:261
2856399109102cyclictest16237-21tune2fs05:25:271
2856399106104cyclictest31305-21tune2fs04:45:271
285639910492cyclictest22778-21tune2fs08:10:211
2858699103102cyclictest0-21swapper/308:10:213
2858699103102cyclictest0-21swapper/304:45:273
2856399103102cyclictest22735-21tune2fs06:55:251
2856399103102cyclictest121ksoftirqd/107:25:071
2856399103102cyclictest0-21swapper/107:55:061
2856399103102cyclictest0-21swapper/107:55:061
28586999392cyclictest0-21swapper/307:05:223
28586999392cyclictest0-21swapper/305:25:273
28586999392cyclictest0-21swapper/304:50:273
28586999392cyclictest0-21swapper/303:35:393
28586999392cyclictest0-21swapper/303:35:393
28563998782cyclictest0-21swapper/107:40:061
28563998782cyclictest0-21swapper/105:20:271
28563998781cyclictest3347-21tune2fs03:40:281
28563998781cyclictest12142-21tune2fs04:00:301
28563998682cyclictest0-21swapper/104:40:141
28563998682cyclictest0-21swapper/103:56:171
28563998682cyclictest0-21swapper/103:56:171
28563998681cyclictest0-21swapper/106:05:221
28563998681cyclictest0-21swapper/103:25:311
28563998671cyclictest0-21swapper/105:50:111
28563998482cyclictest7664-21tune2fs06:20:241
28563998482cyclictest1071-21tune2fs03:35:301
28563998482cyclictest1071-21tune2fs03:35:301
28563998482cyclictest0-21swapper/104:50:271
28586998382cyclictest0-21swapper/308:40:263
28586998382cyclictest0-21swapper/308:05:263
28586998382cyclictest0-21swapper/308:00:283
28586998382cyclictest0-21swapper/307:55:303
28586998382cyclictest0-21swapper/307:50:303
28586998382cyclictest0-21swapper/307:50:303
28586998382cyclictest0-21swapper/307:35:073
28586998382cyclictest0-21swapper/307:35:073
28586998382cyclictest0-21swapper/307:20:083
28586998382cyclictest0-21swapper/307:12:153
28586998382cyclictest0-21swapper/307:00:283
28586998382cyclictest0-21swapper/306:45:323
28586998382cyclictest0-21swapper/306:40:233
28586998382cyclictest0-21swapper/306:30:313
28586998382cyclictest0-21swapper/306:10:253
28586998382cyclictest0-21swapper/305:55:313
28586998382cyclictest0-21swapper/305:35:263
28586998382cyclictest0-21swapper/305:15:293
28586998382cyclictest0-21swapper/305:10:353
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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