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2024-06-20 - 07:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack3slot1.osadl.org (updated Thu Jun 20, 2024 00:43:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1350699110109cyclictest0-21swapper/117:41:141
135089910492cyclictest0-21swapper/317:55:453
135089910392cyclictest0-21swapper/322:10:353
1350899103102cyclictest0-21swapper/321:10:563
1350899103102cyclictest0-21swapper/318:10:443
1350699103102cyclictest0-21swapper/122:10:351
135069910188cyclictest0-21swapper/118:11:131
135069910098cyclictest12611-21tune2fs19:25:571
135069910088cyclictest0-21swapper/122:20:571
135069910088cyclictest0-21swapper/122:20:361
135069910088cyclictest0-21swapper/121:51:041
135069910088cyclictest0-21swapper/121:30:501
135069910088cyclictest0-21swapper/121:05:551
135069910088cyclictest0-21swapper/120:56:521
135069910088cyclictest0-21swapper/120:36:001
135069910088cyclictest0-21swapper/120:35:391
135069910088cyclictest0-21swapper/120:15:411
135069910088cyclictest0-21swapper/118:36:081
135069910088cyclictest0-21swapper/117:06:041
13506999392cyclictest0-21swapper/121:10:561
13506999088cyclictest0-21swapper/121:30:371
13506999088cyclictest0-21swapper/120:45:551
13506999088cyclictest0-21swapper/119:10:551
13506999088cyclictest0-21swapper/118:56:041
13506999088cyclictest0-21swapper/118:41:081
13506999088cyclictest0-21swapper/117:50:451
13506998988cyclictest0-21swapper/122:11:011
13506998988cyclictest0-21swapper/121:45:551
13506998988cyclictest0-21swapper/121:41:091
13506998988cyclictest0-21swapper/121:35:551
13506998988cyclictest0-21swapper/121:15:541
13506998988cyclictest0-21swapper/121:05:381
13506998988cyclictest0-21swapper/120:50:561
13506998988cyclictest0-21swapper/120:40:561
13506998988cyclictest0-21swapper/120:26:131
13506998988cyclictest0-21swapper/120:26:131
13506998988cyclictest0-21swapper/120:20:501
13506998988cyclictest0-21swapper/120:01:081
13506998988cyclictest0-21swapper/119:56:051
13506998988cyclictest0-21swapper/119:45:571
13506998988cyclictest0-21swapper/119:36:091
13506998988cyclictest0-21swapper/119:35:421
13506998988cyclictest0-21swapper/119:20:591
13506998988cyclictest0-21swapper/119:15:591
13506998988cyclictest0-21swapper/119:06:111
13506998988cyclictest0-21swapper/118:51:001
13506998988cyclictest0-21swapper/118:46:171
13506998988cyclictest0-21swapper/118:21:011
13506998988cyclictest0-21swapper/118:06:031
13506998988cyclictest0-21swapper/118:00:591
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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