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2025-07-15 - 02:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot3.osadl.org (updated Tue Jul 15, 2025 00:46:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
128501150irq/42-ahci0-21swapper/219:08:324
16341210995sleep30-21swapper/319:06:375
16438210891sleep110-21swapper/1119:07:573
16349210794sleep90-21swapper/919:06:4311
12850960irq/42-ahci0-21swapper/119:05:191
12850920irq/42-ahci0-21swapper/819:08:5110
2014050840irq/53-eth0-rx-0-21swapper/519:06:427
1658928176sleep70-21swapper/719:09:179
2014050710irq/53-eth0-rx-0-21swapper/419:06:256
1633526760sleep100-21swapper/1019:06:322
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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