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2025-07-13 - 09:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack3slot3.osadl.org (updated Sun Jul 13, 2025 00:46:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6900211095sleep90-21swapper/919:06:5611
6860210794sleep30-21swapper/319:06:265
5408210794sleep100-21swapper/1019:05:202
12850960irq/42-ahci0-21swapper/419:05:076
12850940irq/42-ahci0-21swapper/119:08:511
2014150930irq/54-eth0-tx-0-21swapper/519:05:257
12850930irq/42-ahci0-21swapper/219:08:434
12850910irq/42-ahci0-21swapper/719:08:519
2014050890irq/53-eth0-rx-0-21swapper/819:06:3210
401826653sleep00-21swapper/019:05:110
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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