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2021-07-29 - 04:57

Intel(R) Core(TM) i7 CPU X 980 @ 3.33GHz, Linux 3.12.31-rt45 (Profile)

Latency plot of system in rack #3, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot3.osadl.org (updated Thu Jul 29, 2021 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
873210995sleep90-21swapper/917:41:2311
8074501070irq/52-eth0-rx-0-21swapper/217:45:144
4031210795sleep10-21swapper/117:44:041
807450910irq/52-eth0-rx-0-21swapper/517:44:227
396529080sleep80-21swapper/817:43:1010
11850880irq/42-ahci0-21swapper/717:44:539
11850880irq/42-ahci0-21swapper/317:44:395
807550840irq/53-eth0-tx-0-21swapper/417:44:556
395327264sleep110-21swapper/1117:43:013
387126753sleep60-21swapper/617:41:568
390926553sleep00-21swapper/017:42:260
255726248sleep100-21swapper/1017:41:362
4395994614cyclictest0-21swapper/1119:54:023
4395993415cyclictest0-21swapper/1119:46:123
4395993415cyclictest0-21swapper/1119:45:543
439599330cyclictest0-21swapper/1117:59:033
4395992914cyclictest0-21swapper/1120:57:213
439599250cyclictest0-21swapper/1117:50:513
436199250cyclictest0-21swapper/019:50:420
4394991817cyclictest20971-1kworker/10:2H19:48:212
4394991817cyclictest0-21swapper/1022:55:122
4394991817cyclictest0-21swapper/1022:38:082
439499181cyclictest807450irq/52-eth0-rx-23:01:182
439499181cyclictest807450irq/52-eth0-rx-22:56:582
439499181cyclictest807450irq/52-eth0-rx-21:51:362
439499181cyclictest11850irq/42-ahci23:11:002
439499181cyclictest11850irq/42-ahci21:02:142
439499181cyclictest11850irq/42-ahci20:56:072
439499181cyclictest11850irq/42-ahci19:11:482
439499181cyclictest11850irq/42-ahci18:01:142
439499180cyclictest11850irq/42-ahci20:23:292
439499180cyclictest11850irq/42-ahci19:22:362
4376991816cyclictest2473-21snmpd18:23:014
4394991716cyclictest20971-1kworker/10:2H19:03:162
439499170cyclictest90382sleep1022:16:092
439499170cyclictest83282chrt22:13:202
439499170cyclictest81662sleep1020:46:132
439499170cyclictest807550irq/53-eth0-tx-17:46:252
439499170cyclictest807450irq/52-eth0-rx-22:01:332
439499170cyclictest807450irq/52-eth0-rx-21:11:332
439499170cyclictest807450irq/52-eth0-rx-21:08:092
439499170cyclictest807450irq/52-eth0-rx-19:52:402
439499170cyclictest807450irq/52-eth0-rx-19:08:032
439499170cyclictest807450irq/52-eth0-rx-18:18:242
439499170cyclictest77912sleep1021:27:052
439499170cyclictest75482sleep1020:44:492
439499170cyclictest68002sleep1019:56:462
439499170cyclictest65622sleep1018:31:152
439499170cyclictest5892sleep1020:36:132
439499170cyclictest57412sleep1018:27:032
439499170cyclictest41312sleep1021:21:522
439499170cyclictest323122sleep1018:21:262
439499170cyclictest302902sleep1020:31:242
439499170cyclictest295922sleep1021:57:082
439499170cyclictest287582chrt20:29:122
439499170cyclictest280952sleep1019:42:092
439499170cyclictest260972chrt18:11:382
439499170cyclictest248132chrt18:56:172
439499170cyclictest248132chrt18:56:172
439499170cyclictest245662sleep1019:38:212
439499170cyclictest236322sleep1018:09:272
439499170cyclictest227572sleep1022:32:212
439499170cyclictest223432sleep1021:47:062
439499170cyclictest216202sleep1020:21:002
439499170cyclictest204342sleep1018:48:042
439499170cyclictest195102sleep1023:11:482
439499170cyclictest189942sleep1021:45:542
439499170cyclictest189942sleep1021:45:542
439499170cyclictest178642sleep1020:14:112
439499170cyclictest168062sleep1018:43:522
439499170cyclictest162882chrt22:26:092
439499170cyclictest15952sleep1022:06:202
439499170cyclictest156772sleep1022:24:452
439499170cyclictest150312chrt21:36:412
439499170cyclictest142682chrt20:09:352
439499170cyclictest131022sleep1018:37:522
439499170cyclictest11850irq/42-ahci22:41:142
439499170cyclictest11850irq/42-ahci21:16:122
439499170cyclictest11850irq/42-ahci20:56:122
439499170cyclictest11850irq/42-ahci19:16:302
439499170cyclictest11850irq/42-ahci18:51:212
439499170cyclictest11850irq/42-ahci18:51:212
439499170cyclictest11850irq/42-ahci17:57:112
439499170cyclictest114542sleep1021:32:292
439499170cyclictest113902sleep1017:51:362
439499170cyclictest106372sleep1020:04:342
4381991715cyclictest9995-21snmp_easybox.os17:51:276
4394991615cyclictest172892sleep1019:28:332
439499160cyclictest12632sleep1022:47:592
439399160cyclictest0-21swapper/922:11:0111
439299165cyclictest0-21swapper/821:56:2510
4382991615cyclictest7504-21qemu-kvm20:44:317
438099160cyclictest0-21swapper/318:47:305
438099160cyclictest0-21swapper/318:04:475
436199160cyclictest0-21swapper/019:56:590
439399156cyclictest0-21swapper/922:38:0411
439399150cyclictest12576-21crond23:06:0211
439399150cyclictest0-21swapper/918:36:3511
439299153cyclictest0-21swapper/819:41:1110
438099156cyclictest0-21swapper/322:44:265
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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