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2023-01-28 - 07:57

x86 Intel Core i7-X980 @3333 MHz, Linux 3.12.31-rt45 (Profile)

Latency plot of system in rack #3, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot3.osadl.org (updated Sat Jan 28, 2023 00:46:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5947210794sleep90-21swapper/919:06:5711
120501070irq/42-ahci0-21swapper/119:08:261
120501010irq/42-ahci0-21swapper/219:09:034
1115450980irq/53-eth0-tx-0-21swapper/319:05:125
12050960irq/42-ahci0-21swapper/819:08:3810
1115350930irq/52-eth0-rx-0-21swapper/1019:05:082
12050890irq/42-ahci0-21swapper/719:07:249
1115450840irq/53-eth0-tx-0-21swapper/519:07:147
617228377sleep40-21swapper/419:09:166
591927564sleep00-21swapper/019:06:360
586826759sleep110-21swapper/1119:05:593
589326553sleep60-21swapper/619:06:188
636999192cyclictest1115350irq/52-eth0-rx-19:58:122
6369991817cyclictest0-21swapper/1020:23:432
636999181cyclictest12050irq/42-ahci23:54:352
636999180cyclictest171612chrt23:03:132
636899181cyclictest7322-21sed20:35:2311
636899181cyclictest0-21swapper/923:15:1411
636899181cyclictest0-21swapper/923:05:1511
636899181cyclictest0-21swapper/919:55:2711
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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