You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-12-11 - 16:41
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack3slot3.osadl.org (updated Wed Dec 11, 2024 12:46:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120501210irq/42-ahci0-21swapper/307:08:245
120501210irq/42-ahci0-21swapper/307:08:235
148501010irq/18-uhci_hcd0-21swapper/207:05:264
148501010irq/18-uhci_hcd0-21swapper/207:05:254
1184501000irq/18-i801_smb0-21swapper/907:05:2411
1184501000irq/18-i801_smb0-21swapper/907:05:2411
1218029786sleep50-21swapper/507:06:557
1218029786sleep50-21swapper/507:06:557
128050960irq/18-parport00-21swapper/1107:05:243
128050960irq/18-parport00-21swapper/1107:05:243
2013150940irq/53-eth0-tx-0-21swapper/707:05:189
2013150940irq/53-eth0-tx-0-21swapper/707:05:179
2013050940irq/52-eth0-rx-0-21swapper/107:10:001
2013050940irq/52-eth0-rx-0-21swapper/107:09:591
12050940irq/42-ahci0-21swapper/807:09:3610
12050940irq/42-ahci0-21swapper/807:09:3610
2013050930irq/52-eth0-rx-0-21swapper/1007:07:172
2013050930irq/52-eth0-rx-0-21swapper/1007:07:172
2013050910irq/52-eth0-rx-0-21swapper/407:06:276
2013050910irq/52-eth0-rx-0-21swapper/407:06:276
1216628474sleep60-21swapper/607:06:448
1216628474sleep60-21swapper/607:06:438
1130128171sleep00-21swapper/007:05:260
1130128171sleep00-21swapper/007:05:260
12564993112cyclictest0-21swapper/008:24:450
1260499251cyclictest0-21swapper/908:35:1411
1260499241cyclictest0-21swapper/911:26:2811
1260499241cyclictest0-21swapper/909:03:4611
1260499231cyclictest0-21swapper/911:31:5711
1260499211cyclictest0-21swapper/910:49:5111
14850190irq/18-uhci_hcd0-21swapper/409:05:066
1260599192cyclictest2013050irq/52-eth0-rx-11:05:112
1260499194cyclictest0-21swapper/911:20:0111
118450190irq/18-i801_smb0-21swapper/009:16:180
12605991817cyclictest26010-21sh11:50:182
1260599181cyclictest2013150irq/53-eth0-tx-12:35:232
1260599181cyclictest2013150irq/53-eth0-tx-10:46:002
1260599181cyclictest2013050irq/52-eth0-rx-10:20:302
1260599181cyclictest2013050irq/52-eth0-rx-09:35:252
1260599181cyclictest13250irq/18-ehci_hcd11:20:082
1260599181cyclictest13250irq/18-ehci_hcd10:44:502
1260599181cyclictest13250irq/18-ehci_hcd10:44:502
1260599181cyclictest13250irq/18-ehci_hcd10:38:402
1260599181cyclictest13250irq/18-ehci_hcd10:15:562
1260599181cyclictest13250irq/18-ehci_hcd10:00:342
1260599181cyclictest13250irq/18-ehci_hcd09:54:222
1260599181cyclictest13250irq/18-ehci_hcd09:21:302
1260599181cyclictest13250irq/18-ehci_hcd09:03:382
1260599181cyclictest13250irq/18-ehci_hcd08:52:082
1260599181cyclictest13250irq/18-ehci_hcd08:43:262
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional