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2024-07-27 - 07:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack3slot3.osadl.org (updated Sat Jul 27, 2024 00:46:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15315210795sleep90-21swapper/919:07:2611
15284210391sleep60-21swapper/619:07:008
12250970irq/42-ahci0-21swapper/119:09:231
12250920irq/42-ahci0-21swapper/219:05:404
1105250920irq/52-eth0-rx-0-21swapper/319:05:035
12250880irq/42-ahci0-21swapper/419:06:486
12250830irq/42-ahci0-21swapper/719:08:379
1554528078sleep80-21swapper/819:09:5010
1105250730irq/52-eth0-rx-0-21swapper/1019:07:022
1526826453sleep50-21swapper/519:06:467
1533226253sleep110-21swapper/1119:07:403
1518325955sleep00-21swapper/019:05:420
1570699290cyclictest0-21swapper/1122:15:493
15703991913cyclictest0-21swapper/1000:07:342
15703991817cyclictest0-21swapper/1019:25:542
1570299181cyclictest9472-1kworker/9:0H22:30:0911
1570299181cyclictest0-21swapper/922:35:3811
1570299181cyclictest0-21swapper/900:05:1711
15700991816cyclictest32348-21munin-run21:00:019
15700991816cyclictest26643-21snmp_rack3slot922:20:109
15703991716cyclictest7596-1kworker/10:1H22:06:092
15703991716cyclictest0-21swapper/1020:30:182
1570399170cyclictest98442sleep1019:42:322
1570399170cyclictest67182sleep1020:22:472
1570399170cyclictest61372sleep1019:36:292
1570399170cyclictest52022chrt00:02:002
1570399170cyclictest33762sleep1021:01:162
1570399170cyclictest325492sleep1021:41:092
1570399170cyclictest317132chrt20:11:342
1570399170cyclictest307592sleep1000:38:402
1570399170cyclictest277282sleep1019:23:292
1570399170cyclictest262792chrt23:02:062
1570399170cyclictest254732sleep1000:30:142
1570399170cyclictest241022sleep1019:18:402
1570399170cyclictest24022chrt19:30:422
1570399170cyclictest224152sleep1022:15:012
1570399170cyclictest217912sleep1021:28:072
1570399170cyclictest213422sleep1020:43:372
1570399170cyclictest206462chrt19:55:452
1570399170cyclictest196682sleep1000:20:512
1570399170cyclictest195012sleep1023:38:572
1570399170cyclictest188962chrt22:51:042
1570399170cyclictest181792sleep1021:23:312
1570399170cyclictest176712sleep1020:38:012
1570399170cyclictest154042chrt22:48:162
1570399170cyclictest150692sleep1022:05:012
1570399170cyclictest150692sleep1022:05:002
1570399170cyclictest145392chrt21:18:412
1570399170cyclictest12250irq/42-ahci20:52:482
1570399170cyclictest12250irq/42-ahci20:08:552
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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