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2025-01-14 - 06:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot4.osadl.org (updated Tue Jan 14, 2025 00:46:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4036138230723048,15sleep50-21swapper/519:05:405
4036284218481831,5sleep04034351-21kworker/0:0+events@
dbs_work_handler
19:07:360
403661999120106,7cyclictest4087850-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:23:171
403661999120106,7cyclictest4087850-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
21:23:161
40366139911582,24cyclictest64250irq/527-eth0-Tx22:15:130
40366139911445,58cyclictest0-21swapper/022:26:280
4036613991123,95cyclictest0-21swapper/019:25:190
4036613991112,99cyclictest0-21swapper/021:40:310
9577221100,4sleep230-21ksoftirqd/200:24:152
40366199911096,7cyclictest4052180-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
19:58:111
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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