You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-17 - 07:39
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot4.osadl.org (updated Sun May 17, 2026 00:46:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
931648217331715,9sleep3911568-21kworker/3:2+events@
dbs_work_handler
19:09:183
9318629915326,71cyclictest1021951-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
22:05:410
931862991411,128cyclictest0-21swapper/000:15:190
9318629913936,63cyclictest1151721-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:30:000
9318629913936,63cyclictest1151721-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
23:30:000
9318629913626,47cyclictest1054138-21kworker/u12:0+flush-179:96@
wb_workfn
22:25:360
106495821270,3sleep40-21swapper/422:19:244
9318629912390,25cyclictest1008172-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
21:35:340
9318629912322,54cyclictest0-21swapper/023:05:300
9318629912311,76cyclictest941588-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
19:32:370
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional