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2025-07-02 - 15:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack3slot4.osadl.org (updated Wed Jul 02, 2025 12:46:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3344942232763253,14sleep50-21swapper/507:05:085
3345826228882859,16sleep40-21swapper/407:05:374
3346783991392,119cyclictest3559961-21kworker/u12:3+events_unbound@
flush_memcg_stats_dwork
12:10:270
3346783991170,105cyclictest0-21swapper/008:05:180
3346783991170,105cyclictest0-21swapper/008:05:170
3346783991160,104cyclictest0-21swapper/009:40:150
33467939911097,6cyclictest3583136-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
12:14:502
3346783991100,98cyclictest0-21swapper/011:01:310
3346783991100,98cyclictest0-21swapper/011:01:310
3346783991092,93cyclictest0-21swapper/010:00:260
3346783991090,98cyclictest0-21swapper/008:30:130
3346783991090,98cyclictest0-21swapper/008:30:130
3346783991080,4cyclictest0-21swapper/007:55:150
33467839910470,13cyclictest0-21swapper/009:47:120
348240121030,12sleep337-21ksoftirqd/310:36:533
33467839910169,20cyclictest0-21swapper/007:46:510
3346783991010,82cyclictest0-21swapper/008:40:320
334678399991,84cyclictest0-21swapper/011:27:030
3346793999884,7cyclictest3551827-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
11:59:472
3346793999884,7cyclictest3551827-21kworker/u12:2+events_unbound@
flush_memcg_stats_dwork
11:59:472
3346783999862,22cyclictest0-21swapper/008:10:160
334678399980,82cyclictest0-21swapper/010:25:160
334678399980,79cyclictest0-21swapper/010:10:350
334678399980,79cyclictest0-21swapper/010:10:350
334678399970,87cyclictest0-21swapper/007:50:330
3346783999661,20cyclictest64350irq/528-eth0-Tx09:55:000
3346783999582,6cyclictest3423064-21kworker/u12:4+events_unbound@
flush_memcg_stats_dwork
11:14:380
334678399950,82cyclictest0-21swapper/007:20:390
334678399950,82cyclictest0-21swapper/007:20:390
3346793999482,6cyclictest3489224-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
11:14:402
3346783999456,26cyclictest3495424-21/usr/sbin/munin10:50:400
334678399942,81cyclictest0-21swapper/010:31:050
334678399940,77cyclictest0-21swapper/007:30:350
3346787999378,8cyclictest3583136-21kworker/u12:0+events_unbound@
flush_memcg_stats_dwork
12:14:471
334678399931,74cyclictest0-21swapper/009:05:220
334678399930,79cyclictest0-21swapper/009:15:170
3346783999253,24cyclictest0-21swapper/012:17:170
3346783999253,24cyclictest0-21swapper/012:17:170
3346783999245,35cyclictest0-21swapper/011:43:310
334678399922,85cyclictest0-21swapper/011:50:050
334678399921,81cyclictest0-21swapper/008:45:140
334678399920,88cyclictest0-21swapper/007:15:010
334678399920,88cyclictest0-21swapper/007:15:010
334678399920,77cyclictest0-21swapper/008:35:420
3346783999159,22cyclictest0-21swapper/007:35:560
3346783999140,31cyclictest0-21swapper/012:21:190
334678399910,79cyclictest0-21swapper/008:55:200
334678399910,78cyclictest0-21swapper/009:11:040
334678399910,78cyclictest0-21swapper/009:11:040
3346783999068,12cyclictest0-21swapper/012:35:330
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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