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2021-01-27 - 11:02

Intel(R) Atom(TM) CPU N455 @ 1.66GHz, Linux 5.4.34-rt21 (Profile)

Latency plot of system in rack #3, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot6 (updated Mon Jan 11, 2021 12:45:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
16186218456,81sleep10-21swapper/107:05:071
2505521010,12sleep11779399cyclictest10:40:101
17785999860,25cyclictest9337-21sendmail-msp08:20:110
17793999645,18cyclictest21-21ksoftirqd/109:55:061
17785999557,23cyclictest256-21systemd-journal09:20:050
17785999259,23cyclictest9-21ksoftirqd/009:40:060
17785999259,23cyclictest503-21dbus-daemon10:00:030
1779399916,67cyclictest0-21swapper/111:00:071
17785999159,22cyclictest16477-21sendmail-msp08:40:110
17793998934,15cyclictest17690-21sendmail-msp10:20:071
52492870,5sleep14180-21sendmail-msp09:40:401
17785998758,17cyclictest0-21swapper/012:10:050
17785998555,19cyclictest18547-21seq08:45:070
17785998553,18cyclictest9-21ksoftirqd/012:05:040
17785998455,17cyclictest9-21ksoftirqd/008:15:050
17793998240,13cyclictest21-21ksoftirqd/112:20:071
17785998251,20cyclictest9-21ksoftirqd/012:00:040
17785998151,16cyclictest9-21ksoftirqd/008:10:090
17785998151,16cyclictest9-21ksoftirqd/008:10:080
17785998051,17cyclictest0-21swapper/009:10:050
17785998051,16cyclictest0-21swapper/007:15:110
17785997952,15cyclictest1-21systemd08:00:080
17785997950,15cyclictest0-21swapper/010:10:040
17785997950,15cyclictest0-21swapper/007:45:050
17785997850,15cyclictest0-21swapper/011:50:040
17785997848,17cyclictest9-21ksoftirqd/008:55:040
17785997847,17cyclictest0-21swapper/009:30:020
17785997845,17cyclictest0-21swapper/009:45:040
17785997648,18cyclictest221-21jbd2/sda1-810:40:080
17785997645,16cyclictest0-21swapper/009:35:060
1627527629,34sleep00-21swapper/007:05:100
17785997546,16cyclictest0-21swapper/010:05:030
17785997545,19cyclictest9-21ksoftirqd/012:15:060
17785997545,19cyclictest9-21ksoftirqd/012:15:060
17785997445,16cyclictest0-21swapper/010:45:050
17785997443,20cyclictest9-21ksoftirqd/010:25:060
17785997438,24cyclictest9-21ksoftirqd/007:55:060
17785997343,18cyclictest5647-21sendmail-msp11:20:070
17785997244,14cyclictest0-21swapper/008:25:040
17785997243,16cyclictest492-21rs:main0
17793997129,26cyclictest0-21swapper/111:40:071
17785997141,17cyclictest9-21ksoftirqd/009:05:040
1779399704,10cyclictest28263-21sendmail-msp07:40:441
1779399704,10cyclictest28263-21sendmail-msp07:40:441
17793997027,26cyclictest21-21ksoftirqd/112:00:041
17793997017,28cyclictest21-21ksoftirqd/110:00:271
17785997044,15cyclictest0-21swapper/011:35:040
17785997041,17cyclictest0-21swapper/008:35:030
17785997041,17cyclictest0-21swapper/008:35:030
17785997010,13cyclictest28263-21sendmail-msp07:41:510
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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