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2025-06-18 - 23:52

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #3, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot6s.osadl.org (updated Wed Jun 18, 2025 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20653211387,20sleep10-21swapper/107:07:201
20619210999,6sleep30-21swapper/307:06:543
20851210787,14sleep00-21swapper/007:09:510
20591210184,11sleep20-21swapper/207:06:332
204722820,0sleep00-21swapper/009:58:080
296322730,1sleep20-21swapper/207:30:162
132232720,0sleep10-21swapper/109:17:441
86162710,0sleep10-21swapper/111:57:011
304342610,5sleep22089199cyclictest09:35:182
2088999341,19cyclictest10149-21ssh09:15:120
20891992318,3cyclictest16741-21kworker/u8:210:27:042
2089199210,16cyclictest0-21swapper/212:31:042
20892992017,2cyclictest30275-21kworker/u8:110:14:053
20892992017,2cyclictest22971-21kworker/u8:010:48:053
2089199203,6cyclictest0-21swapper/212:14:042
2089199201,2cyclictest0-21swapper/209:16:012
2089199200,2cyclictest0-21swapper/209:55:142
44152190,1sleep30-21swapper/311:53:183
20892991916,2cyclictest922-21kworker/u8:109:10:053
20892991916,2cyclictest22971-21kworker/u8:010:39:053
20892991916,2cyclictest21514-21kworker/u8:211:06:053
20892991916,2cyclictest16945-21kworker/u8:212:19:043
20892991916,2cyclictest16945-21kworker/u8:212:00:053
20892991916,2cyclictest16741-21kworker/u8:210:42:043
20892991916,2cyclictest14391-21kworker/u8:112:10:053
20892991916,2cyclictest10628-21kworker/u8:111:36:053
20892991916,2cyclictest10628-21kworker/u8:111:28:053
2089299191,2cyclictest0-21swapper/309:16:013
20891991916,2cyclictest3393-21kworker/u8:011:26:062
20891991916,2cyclictest3326-21kworker/u8:111:57:042
20891991916,2cyclictest16741-21kworker/u8:210:50:052
20891991916,2cyclictest1652-21kworker/u8:009:44:042
2089199191,2cyclictest0-21swapper/212:03:042
2089199190,2cyclictest0-21swapper/209:33:042
2089199190,14cyclictest0-21swapper/210:08:042
20890991913,4cyclictest22716-21ssh12:11:041
2088999190,2cyclictest0-21swapper/012:20:130
20892991815,2cyclictest28583-21kworker/u8:210:01:043
20892991815,2cyclictest24645-21kworker/u8:010:05:043
20892991815,2cyclictest23149-21kworker/u8:107:42:043
20892991815,2cyclictest1652-21kworker/u8:009:47:053
20891991815,2cyclictest8649-21kworker/u8:008:03:052
20891991815,2cyclictest31090-21kworker/u8:209:05:042
20891991815,2cyclictest28583-21kworker/u8:209:54:042
20891991815,2cyclictest22971-21kworker/u8:010:44:042
20891991815,2cyclictest22821-21kworker/u8:108:34:042
20891991815,2cyclictest16945-21kworker/u8:211:54:022
20891991815,2cyclictest16945-21kworker/u8:211:40:042
20891991815,2cyclictest16047-21kworker/u8:011:03:052
2089199180,2cyclictest0-21swapper/210:46:052
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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