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2021-06-17 - 20:09

AMD Phenom(tm) II X6 1090T Processor, Linux 4.4.162-rt175 (Profile)

Latency plot of system in rack #3, slot #8
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot8.osadl.org (updated Sun Feb 10, 2019 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
209712207161sleep40-21swapper/407:05:464
213162186124sleep20-21swapper/207:07:332
215612180118sleep10-21swapper/107:09:021
213972174113sleep00-21swapper/007:08:010
215992151130sleep30-21swapper/307:09:233
215862151114sleep50-21swapper/507:09:125
217169910197cyclictest0-21swapper/210:50:102
21717999994cyclictest0-21swapper/310:50:183
21715999996cyclictest0-21swapper/110:50:171
21716999792cyclictest0-21swapper/207:20:152
21716999586cyclictest0-21swapper/210:02:352
21716999489cyclictest0-21swapper/209:33:002
21716999488cyclictest0-21swapper/208:25:092
21714999490cyclictest0-21swapper/009:50:050
21718999392cyclictest0-21swapper/410:50:174
21716999388cyclictest0-21swapper/211:25:072
21716999388cyclictest0-21swapper/209:00:162
21716999385cyclictest0-21swapper/212:20:122
21714999392cyclictest0-21swapper/008:45:150
21716999282cyclictest0-21swapper/212:39:352
21715999287cyclictest0-21swapper/111:35:151
21714999291cyclictest0-21swapper/010:55:310
21718999186cyclictest0-21swapper/412:40:154
21718999186cyclictest0-21swapper/408:01:094
21718999186cyclictest0-21swapper/407:57:114
21718999186cyclictest0-21swapper/407:27:054
21718999182cyclictest0-21swapper/409:57:044
21716999187cyclictest0-21swapper/210:50:342
21714999190cyclictest0-21swapper/012:40:160
21714999190cyclictest0-21swapper/012:08:100
21714999190cyclictest0-21swapper/010:05:340
21714999190cyclictest0-21swapper/009:42:130
21718999086cyclictest0-21swapper/412:08:114
21718999086cyclictest0-21swapper/409:53:084
21718999085cyclictest0-21swapper/408:57:154
21718999082cyclictest0-21swapper/409:32:044
21716999086cyclictest0-21swapper/209:55:102
21716999080cyclictest0-21swapper/212:15:432
21714999089cyclictest0-21swapper/011:50:150
21714999089cyclictest0-21swapper/011:10:150
21714999089cyclictest0-21swapper/011:02:190
21714999089cyclictest0-21swapper/009:53:080
21714999089cyclictest0-21swapper/009:32:070
21714999089cyclictest0-21swapper/009:28:050
21714999089cyclictest0-21swapper/008:57:150
21714999089cyclictest0-21swapper/008:01:090
21714999089cyclictest0-21swapper/007:57:110
21714999089cyclictest0-21swapper/007:42:100
21718998985cyclictest0-21swapper/411:02:194
21718998985cyclictest0-21swapper/410:27:124
21718998985cyclictest0-21swapper/408:32:064
21716998988cyclictest0-21swapper/212:35:102
21716998988cyclictest0-21swapper/210:25:112
21716998988cyclictest0-21swapper/210:20:102
21716998988cyclictest0-21swapper/208:45:152
21716998988cyclictest0-21swapper/207:15:342
21716998985cyclictest0-21swapper/208:30:072
21716998980cyclictest0-21swapper/208:20:032
21714998989cyclictest0-21swapper/012:25:190
21714998989cyclictest0-21swapper/010:17:050
21714998988cyclictest0-21swapper/011:55:120
21714998988cyclictest0-21swapper/008:37:130
21718998882cyclictest0-21swapper/409:12:114
21718998880cyclictest0-21swapper/411:17:104
21716998887cyclictest0-21swapper/212:25:162
21716998887cyclictest0-21swapper/208:50:082
21716998887cyclictest0-21swapper/207:30:352
21716998887cyclictest0-21swapper/207:25:112
21716998882cyclictest0-21swapper/209:57:002
21716998880cyclictest0-21swapper/208:51:202
21716998880cyclictest0-21swapper/207:50:352
21716998876cyclictest0-21swapper/212:30:152
21715998884cyclictest0-21swapper/112:08:101
21715998883cyclictest0-21swapper/109:53:081
21715998883cyclictest0-21swapper/108:01:101
21719998781cyclictest0-21swapper/511:50:155
21718998786cyclictest0-21swapper/411:35:154
21718998785cyclictest0-21swapper/410:37:114
21718998782cyclictest0-21swapper/410:55:314
21718998781cyclictest0-21swapper/408:13:054
21718998780cyclictest0-21swapper/411:53:164
21718998780cyclictest0-21swapper/411:12:114
21718998780cyclictest0-21swapper/409:22:184
21718998780cyclictest0-21swapper/407:42:064
21717998777cyclictest0-21swapper/309:57:043
21716998786cyclictest0-21swapper/210:45:342
21715998783cyclictest0-21swapper/110:17:051
21714998786cyclictest0-21swapper/009:15:150
21718998680cyclictest0-21swapper/412:32:174
21718998680cyclictest0-21swapper/411:37:114
21718998680cyclictest0-21swapper/410:32:104
21718998680cyclictest0-21swapper/408:51:184
21716998685cyclictest0-21swapper/210:35:052
21716998681cyclictest0-21swapper/212:05:162
21716998681cyclictest0-21swapper/207:35:352
21716998681cyclictest0-21swapper/207:35:042
21716998680cyclictest0-21swapper/211:10:302
21716998680cyclictest0-21swapper/210:12:392
21715998681cyclictest0-21swapper/108:45:161
21714998685cyclictest0-21swapper/012:15:150
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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