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2019-07-17 - 00:44

Intel(R) Xeon(R) CPU E3-1220L V2 @ 2.30GHz, Linux 4.19.8-rt6 (Profile)

Latency plot of system in rack #4, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack4slot0.osadl.org (updated Tue Jul 16, 2019 12:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
256232750,0sleep20-21swapper/208:10:082
3201225725,9sleep20-21swapper/207:05:392
3208425425,9sleep30-21swapper/307:06:243
3206424630,9sleep10-21swapper/107:06:141
3162024623,16sleep00-21swapper/007:05:150
32579992319,2cyclictest260050irq/24-eno111:30:003
32579991513,1cyclictest1043-21pmu-power07:10:103
3257999150,1cyclictest0-21swapper/312:10:103
3257999150,1cyclictest0-21swapper/308:55:133
3257999150,14cyclictest0-21swapper/311:50:013
3257399155,9cyclictest14851-21kworker/u8:210:39:552
32573991513,1cyclictest21964-21sensors_volt09:20:132
3257399150,14cyclictest0-21swapper/207:30:102
3256299150,1cyclictest0-21swapper/110:25:121
3257999140,10cyclictest25206-21diskstats10:50:033
3256299144,9cyclictest241ktimersoftd/110:35:271
3257999138,3cyclictest8866-21cat07:30:003
32579991310,2cyclictest3682-21ntp_kernel_pll_07:15:103
3257999130,11cyclictest0-21swapper/309:37:593
3257999130,10cyclictest27207-21df10:55:023
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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