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2021-07-26 - 18:52

Intel(R) Xeon(R) CPU E3-1220L V2 @ 2.30GHz, Linux 4.19.8-rt6 (Profile)

Latency plot of system in rack #4, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack4slot0.osadl.org (updated Mon Jul 26, 2021 12:44:14)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
65892770,0sleep00-21swapper/009:58:550
316682700,1sleep231666-21sshd11:49:282
7132680,0sleep21433-21nfsd09:18:052
266302670,0sleep10-21swapper/111:56:361
115272670,0sleep30-21swapper/312:35:413
321862650,1sleep0101ktimersoftd/008:55:010
129682650,1sleep012967-21grep09:42:000
91422630,0sleep30-21swapper/312:26:323
269662630,0sleep00-21swapper/011:39:240
70312610,0sleep20-21swapper/212:34:492
1965526024,29sleep30-21swapper/307:05:133
2107725626,10sleep10-21swapper/107:08:081
2083324622,17sleep20-21swapper/207:05:582
1946624427,10sleep00-21swapper/007:05:060
183512430,0sleep018352-21grepconf.sh10:36:340
183512430,0sleep018352-21grepconf.sh10:36:330
2139499233,2cyclictest0-21swapper/310:43:423
2138899232,1cyclictest16436-21perf12:20:002
2137699233,2cyclictest21179-21lspci09:24:290
2138899220,4cyclictest0-21swapper/211:24:292
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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