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2022-05-28 - 15:51

x86 Intel Xeon E3-1220L V2 @2300 MHz, Linux 4.19.8-rt6 (Profile)

Latency plot of system in rack #4, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack4slot0.osadl.org (updated Sat May 28, 2022 12:44:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1702521370,0sleep00-21swapper/009:20:180
2976321130,0sleep20-21swapper/211:07:182
1262221000,2sleep21652999cyclictest09:26:372
185122810,0sleep10-21swapper/111:33:221
289482800,0sleep10-21swapper/112:12:021
231572750,0sleep00-21swapper/012:28:320
87772740,0sleep00-21swapper/009:16:010
256702720,0sleep20-21swapper/212:01:292
280762710,1sleep0111rcuc/010:29:360
176112700,0sleep0111rcuc/010:14:530
148442700,0sleep314840-21lspci09:13:153
96462690,0sleep20-21swapper/211:59:442
82762690,0sleep20-21swapper/210:54:472
301512670,3sleep11652899cyclictest12:25:531
99912660,0sleep30-21swapper/310:10:433
273252660,0sleep00-21swapper/007:35:120
158062660,0sleep00-21swapper/009:57:360
117122660,0sleep011704-21sshd11:12:130
298192650,2sleep31653499cyclictest11:44:463
146012650,0sleep20-21swapper/210:00:562
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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