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2019-07-17 - 00:47

AMD Eng Sample: ZM277192H4468_36/27/15/06_130C, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #4, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot1.osadl.org (updated Tue Jul 16, 2019 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139502260119,101sleep20-21swapper/207:06:042
120432223118,94sleep30-21swapper/307:04:523
140602167119,10sleep00-21swapper/007:07:300
140362150120,22sleep10-21swapper/107:07:111
1667721090,1sleep016679-21tr08:24:520
14437997869,7cyclictest956-21snmpd08:10:090
14451997774,1cyclictest0-21swapper/307:51:563
14437997774,1cyclictest956-21snmpd10:31:520
152642760,2sleep30-21swapper/307:09:573
14442997674,1cyclictest0-21swapper/107:51:561
14437997573,1cyclictest956-21snmpd07:34:470
14437997572,1cyclictest956-21snmpd12:36:460
14437997572,1cyclictest956-21snmpd10:26:130
14437997572,1cyclictest956-21snmpd09:21:050
14447997471,1cyclictest0-21swapper/209:31:082
14437997471,1cyclictest956-21snmpd11:12:470
14437997471,1cyclictest956-21snmpd10:55:070
14437997471,1cyclictest956-21snmpd10:55:070
14437997471,1cyclictest956-21snmpd09:14:470
14437997471,1cyclictest956-21snmpd07:36:560
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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