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2023-02-07 - 18:56

ARM TI AM3354 @800 MHz, Linux 5.10.47-rt46 (Profile)

Latency plot of system in rack #4, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l50000000 -m -n -a0 -t1 -p99 -i400 -h400 -q
Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot2.osadl.org (updated Tue Feb 07, 2023 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
73502040,0irq/45-4a10000023142-21kworker/0:207:06:160
249509913158,0cyclictest7350irq/45-4a10000010:17:540
249509913154,0cyclictest7350irq/45-4a10000008:58:310
249509913127,0cyclictest30510-21seq07:21:080
249509912948,0cyclictest7350irq/45-4a10000008:47:410
249509912849,0cyclictest7350irq/45-4a10000008:57:250
249509912742,0cyclictest12-21ksoftirqd/009:03:190
249509912642,0cyclictest29767-21fschecks_count12:03:000
249509912639,0cyclictest0-21swapper07:36:040
249509912541,0cyclictest0-21swapper08:13:350
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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