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2023-02-06 - 20:46

ARM TI AM3354 @800 MHz, Linux 5.10.47-rt46 (Profile)

Latency plot of system in rack #4, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l50000000 -m -n -a0 -t1 -p99 -i400 -h400 -q
Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot2.osadl.org (updated Mon Feb 06, 2023 12:43:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
73505240,0irq/45-4a10000025013-21kworker/0:407:03:170
30600999357,0cyclictest0-21swapper09:47:440
30600999270,0cyclictest0-21swapper08:23:100
30600999256,0cyclictest0-21swapper10:52:590
30600999253,0cyclictest0-21swapper11:27:310
30600999158,0cyclictest0-21swapper12:33:400
30600999069,0cyclictest0-21swapper10:32:510
30600999066,0cyclictest0-21swapper11:18:350
30600999058,0cyclictest0-21swapper08:08:130
30600999057,0cyclictest0-21swapper08:13:240
30600999056,0cyclictest0-21swapper10:07:420
30600998958,0cyclictest0-21swapper09:03:310
30600998958,0cyclictest0-21swapper07:53:310
30600998957,0cyclictest0-21swapper07:43:070
30600998957,0cyclictest0-21swapper07:38:210
30600998866,0cyclictest0-21swapper11:48:140
30600998858,0cyclictest0-21swapper07:08:120
30600998856,0cyclictest0-21swapper08:03:270
30600998756,0cyclictest0-21swapper11:58:280
30600998755,0cyclictest0-21swapper11:08:140
30600998755,0cyclictest0-21swapper10:13:080
30600998754,0cyclictest0-21swapper12:03:110
30600998753,0cyclictest0-21swapper10:18:280
30600998657,0cyclictest0-21swapper08:38:220
30600998654,0cyclictest0-21swapper11:42:440
30600998654,0cyclictest0-21swapper10:03:050
30600998654,0cyclictest0-21swapper07:58:370
30600998565,0cyclictest0-21swapper10:58:350
30600998564,0cyclictest0-21swapper12:23:290
30600998562,0cyclictest0-21swapper08:47:500
30600998554,0cyclictest0-21swapper10:48:100
30600998451,0cyclictest0-21swapper08:32:560
30600998451,0cyclictest0-21swapper07:33:350
30600998352,0cyclictest0-21swapper07:13:140
30600998351,0cyclictest0-21swapper08:28:170
30600998261,0cyclictest0-21swapper10:38:360
30600998254,0cyclictest0-21swapper11:53:300
30600998250,0cyclictest0-21swapper09:38:290
30600998151,0cyclictest0-21swapper10:42:440
30600998149,0cyclictest0-21swapper11:33:310
30600998149,0cyclictest0-21swapper07:48:020
30600998053,0cyclictest0-21swapper08:44:460
30600998052,0cyclictest0-21swapper11:30:010
30600998049,0cyclictest0-21swapper07:29:320
30600998049,0cyclictest0-21swapper07:23:240
30600997863,0cyclictest7350irq/45-4a10000007:17:590
30600997858,0cyclictest2777-21/usr/sbin/munin12:19:420
30600997856,0cyclictest0-21swapper08:18:250
30600997851,0cyclictest12277-21copy09:29:030
30600997849,0cyclictest0-21swapper09:44:540
30600997848,0cyclictest0-21swapper12:13:030
30600997763,0cyclictest7350irq/45-4a10000008:57:580
30600997755,0cyclictest0-21swapper11:13:250
30600997747,0cyclictest0-21swapper11:38:210
30600997747,0cyclictest0-21swapper09:08:160
30600997746,0cyclictest0-21swapper08:53:270
30600997664,0cyclictest7350irq/45-4a10000010:29:130
30600997659,0cyclictest7350irq/45-4a10000009:17:300
30600997648,0cyclictest0-21swapper12:28:300
30600997561,0cyclictest7350irq/45-4a10000011:04:450
30600997453,0cyclictest19371-21runrttasks09:55:580
30600997362,0cyclictest7350irq/45-4a10000009:19:070
30600997244,0cyclictest0-21swapper09:34:320
30600997242,0cyclictest0-21swapper12:08:240
30600997053,0cyclictest19841-21cpu09:57:430
30600996948,0cyclictest12280-21latency_hist09:27:290
30600996856,0cyclictest12-21ksoftirqd/010:27:290
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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