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2022-05-27 - 18:15

PowerPC Freescale e5500 @1200 MHz, Linux 4.1.8-rt8+gbd51baffc04e (Profile)

Latency plot of system in rack #4, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot4.osadl.org (updated Fri May 27, 2022 12:44:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71810rcu_preempt0-21swapper/012:37:260
71810rcu_preempt0-21swapper/012:37:260
71810rcu_preempt0-21swapper/012:37:260
71680rcu_preempt0-21swapper/209:29:542
71680rcu_preempt0-21swapper/209:29:542
71610rcu_preempt0-21swapper/210:28:312
71610rcu_preempt0-21swapper/210:28:312
71610rcu_preempt0-21swapper/210:28:312
71480rcu_preempt0-21swapper/210:45:572
71480rcu_preempt0-21swapper/210:45:572
71480rcu_preempt0-21swapper/210:45:572
71480rcu_preempt0-21swapper/011:04:300
71480rcu_preempt0-21swapper/011:04:300
71480rcu_preempt0-21swapper/011:04:300
71430rcu_preempt0-21swapper/109:50:411
71430rcu_preempt0-21swapper/109:50:411
71430rcu_preempt0-21swapper/109:50:411
71410rcu_preempt28549-1kworker/2:1H12:19:032
71410rcu_preempt28549-1kworker/2:1H12:19:032
71400rcu_preempt0-21swapper/208:26:132
71400rcu_preempt0-21swapper/208:26:132
46050400irq/122-QManpo0-210
46050400irq/122-QManpo0-210
99650390irq/38-i2c-mpc0-21swapper/009:39:210
99650390irq/38-i2c-mpc0-21swapper/009:39:210
99650390irq/38-i2c-mpc0-21swapper/009:39:210
71390rcu_preempt6890-21ssh11:35:231
71390rcu_preempt6890-21ssh11:35:231
71390rcu_preempt30538-21/usr/sbin/munin11:19:272
71390rcu_preempt30538-21/usr/sbin/munin11:19:272
71390rcu_preempt30538-21/usr/sbin/munin11:19:272
71390rcu_preempt25816-21ssh10:11:421
71390rcu_preempt25816-21ssh10:11:421
71390rcu_preempt0-21swapper/212:38:582
71390rcu_preempt0-21swapper/212:38:582
71390rcu_preempt0-21swapper/212:38:582
71390rcu_preempt0-21swapper/210:14:262
71390rcu_preempt0-21swapper/210:14:262
71390rcu_preempt0-21swapper/108:59:091
71390rcu_preempt0-21swapper/108:59:091
71390rcu_preempt0-21swapper/108:24:181
71390rcu_preempt0-21swapper/108:24:181
46050390irq/122-QManpo28343-2109:24:360
46050390irq/122-QManpo28343-2109:24:360
46050390irq/122-QManpo11127-2109:24:360
46050390irq/122-QManpo11127-2109:24:360
46050390irq/122-QManpo11127-2109:24:360
71380rcu_preempt7027-21sh12:34:561
71380rcu_preempt7027-21sh12:34:561
71380rcu_preempt7027-21sh12:34:561
71380rcu_preempt1905-21snmpd12:19:081
71380rcu_preempt1905-21snmpd12:19:081
71380rcu_preempt1905-21snmpd12:19:081
71380rcu_preempt0-21swapper/312:01:223
71380rcu_preempt0-21swapper/312:01:223
71380rcu_preempt0-21swapper/212:29:012
71380rcu_preempt0-21swapper/212:29:012
71380rcu_preempt0-21swapper/212:12:552
71380rcu_preempt0-21swapper/212:12:552
71380rcu_preempt0-21swapper/210:59:132
71380rcu_preempt0-21swapper/210:59:132
71380rcu_preempt0-21swapper/210:38:372
71380rcu_preempt0-21swapper/210:38:372
71380rcu_preempt0-21swapper/210:11:172
71380rcu_preempt0-21swapper/210:11:172
71380rcu_preempt0-21swapper/209:38:582
71380rcu_preempt0-21swapper/209:38:582
71380rcu_preempt0-21swapper/209:38:582
71380rcu_preempt0-21swapper/208:59:102
71380rcu_preempt0-21swapper/208:59:102
46050380irq/122-QManpo11071-2109:24:360
46050380irq/122-QManpo11071-2109:24:360
46050380irq/122-QManpo0-210
46050380irq/122-QManpo0-210
71370rcu_preempt0-21swapper/311:16:533
71370rcu_preempt0-21swapper/311:16:533
71370rcu_preempt0-21swapper/311:16:533
71370rcu_preempt0-21swapper/212:31:232
71370rcu_preempt0-21swapper/212:31:232
71370rcu_preempt0-21swapper/211:57:532
71370rcu_preempt0-21swapper/211:57:532
71370rcu_preempt0-21swapper/107:39:231
71370rcu_preempt0-21swapper/107:39:231
71370rcu_preempt0-21swapper/107:39:231
46050370irq/122-QManpo29747-2109:24:360
46050370irq/122-QManpo29747-2109:24:360
46050370irq/122-QManpo29747-2109:24:360
46050370irq/122-QManpo2885-2109:24:360
46050370irq/122-QManpo2885-2109:24:360
46050370irq/122-QManpo0-210
46050370irq/122-QManpo0-210
131692370sleep05163-1kworker/0:2H08:22:590
131692370sleep05163-1kworker/0:2H08:22:590
71360rcu_preempt28298-21cyclictest11:34:493
71360rcu_preempt28298-21cyclictest11:34:493
71360rcu_preempt26298-21diskmemload12:07:503
71360rcu_preempt26298-21diskmemload12:07:503
71360rcu_preempt26298-21diskmemload12:07:503
71360rcu_preempt26298-21diskmemload09:44:022
71360rcu_preempt26298-21diskmemload09:44:022
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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