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2026-05-19 - 08:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack4slot4.osadl.org (updated Tue May 19, 2026 00:44:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71740rcu_preempt0-21swapper/223:06:142
71740rcu_preempt0-21swapper/223:06:142
71740rcu_preempt0-21swapper/223:06:142
71730rcu_preempt0-21swapper/021:53:070
71730rcu_preempt0-21swapper/021:53:070
71730rcu_preempt0-21swapper/021:53:070
71570rcu_preempt0-21swapper/021:22:200
71570rcu_preempt0-21swapper/021:22:200
71560rcu_preempt0-21swapper/322:34:033
71560rcu_preempt0-21swapper/322:34:033
71560rcu_preempt0-21swapper/200:18:412
71560rcu_preempt0-21swapper/200:18:412
71540rcu_preempt10224-21sh00:36:550
71540rcu_preempt10224-21sh00:36:550
71510rcu_preempt7932-21copy22:33:082
71510rcu_preempt7932-21copy22:33:082
71510rcu_preempt0-21swapper/021:52:540
71510rcu_preempt0-21swapper/021:52:540
71510rcu_preempt0-21swapper/021:52:540
71450rcu_preempt0-21swapper/120:03:071
71450rcu_preempt0-21swapper/120:03:071
278522450sleep023020-1kworker/0:3H19:09:130
278522450sleep023020-1kworker/0:3H19:09:130
71440rcu_preempt9320-21diskmemload23:34:170
71440rcu_preempt9320-21diskmemload23:34:170
71440rcu_preempt0-21swapper/121:29:551
71440rcu_preempt0-21swapper/121:29:551
71440rcu_preempt0-21swapper/121:29:551
71440rcu_preempt0-21swapper/021:24:470
71440rcu_preempt0-21swapper/021:24:470
71440rcu_preempt0-21swapper/021:24:470
71430rcu_preempt0-21swapper/020:11:180
71430rcu_preempt0-21swapper/020:11:180
71420rcu_preempt0-21swapper/319:58:293
71420rcu_preempt0-21swapper/319:58:293
71420rcu_preempt0-21swapper/319:58:293
71420rcu_preempt0-21swapper/100:35:411
71420rcu_preempt0-21swapper/100:35:411
71420rcu_preempt0-21swapper/023:58:320
71420rcu_preempt0-21swapper/023:58:320
71420rcu_preempt0-21swapper/022:58:330
71420rcu_preempt0-21swapper/022:58:330
71420rcu_preempt0-21swapper/022:17:280
71420rcu_preempt0-21swapper/022:17:280
71420rcu_preempt0-21swapper/020:03:150
71420rcu_preempt0-21swapper/020:03:150
71410rcu_preempt14087-21sh23:43:213
71410rcu_preempt14087-21sh23:43:213
71410rcu_preempt0-21swapper/023:11:390
71410rcu_preempt0-21swapper/023:11:390
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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