You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-04-21 - 07:09
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack4slot4.osadl.org (updated Sun Apr 21, 2024 00:46:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71610rcu_preempt0-21swapper/201:01:192
71610rcu_preempt0-21swapper/201:01:192
71560rcu_preempt1792-21diskmemload23:43:101
71560rcu_preempt1792-21diskmemload23:43:101
71540rcu_preempt0-21swapper/122:10:171
71540rcu_preempt0-21swapper/122:10:171
71540rcu_preempt0-21swapper/122:10:171
71500rcu_preempt22512-21kworker/1:220:52:001
71500rcu_preempt22512-21kworker/1:220:52:001
46050460irq/122-QManpo0-210
46050460irq/122-QManpo0-210
100550460irq/38-i2c-mpc0-21swapper/300:35:123
100550460irq/38-i2c-mpc0-21swapper/300:35:123
71450rcu_preempt16476-21sh22:57:042
71450rcu_preempt16476-21sh22:57:042
71450rcu_preempt0-21swapper/222:52:392
71450rcu_preempt0-21swapper/222:52:392
71440rcu_preempt0-21swapper/300:45:593
71440rcu_preempt0-21swapper/300:45:593
71440rcu_preempt0-21swapper/221:35:102
71440rcu_preempt0-21swapper/221:35:102
71440rcu_preempt0-21swapper/120:50:081
71440rcu_preempt0-21swapper/120:50:081
71420rcu_preempt0-21swapper/223:20:232
71420rcu_preempt0-21swapper/223:20:232
71420rcu_preempt0-21swapper/223:20:232
100550420irq/38-i2c-mpc0-21swapper/320:29:173
100550420irq/38-i2c-mpc0-21swapper/320:29:173
71400rcu_preempt25709-21kworker/3:123:36:183
71400rcu_preempt25709-21kworker/3:123:36:183
71400rcu_preempt25709-21kworker/3:123:36:183
71400rcu_preempt0-21swapper/222:17:142
71400rcu_preempt0-21swapper/222:17:142
71400rcu_preempt0-21swapper/222:12:392
71400rcu_preempt0-21swapper/222:12:392
71400rcu_preempt0-21swapper/222:09:522
71400rcu_preempt0-21swapper/222:09:522
71400rcu_preempt0-21swapper/222:09:522
71400rcu_preempt0-21swapper/123:36:321
71400rcu_preempt0-21swapper/123:36:321
71400rcu_preempt0-21swapper/123:36:321
71400rcu_preempt0-21swapper/123:03:171
71400rcu_preempt0-21swapper/123:03:171
71390rcu_preempt25709-21kworker/3:123:39:193
71390rcu_preempt25709-21kworker/3:123:39:193
71390rcu_preempt25709-21kworker/3:123:39:193
71390rcu_preempt25709-21kworker/3:122:25:043
71390rcu_preempt25709-21kworker/3:122:25:043
71390rcu_preempt0-21swapper/323:05:103
71390rcu_preempt0-21swapper/323:05:103
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional