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2025-07-10 - 06:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot6.osadl.org (updated Thu Jul 10, 2025 00:44:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27677521130,99pltrace0-21swapper/219:09:322
27677521050,89pltrace0-21swapper/119:07:051
27677521040,95pltrace0-21swapper/319:05:163
27677521020,93pltrace0-21swapper/719:05:127
27677521000,90pltrace0-21swapper/519:05:205
441052980,1pltrace0-21swapper/400:10:044
2767752940,90pltrace0-21swapper/619:08:136
2990526551,10sleep00-21swapper/019:07:380
2977926441,18sleep40-21swapper/419:05:504
1012352280,0pltrace0-21swapper/719:30:227
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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