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2026-05-16 - 10:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack4slot6.osadl.org (updated Sat May 16, 2026 00:44:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30651521170,106pltrace0-21swapper/219:07:412
30651521070,98pltrace0-21swapper/519:06:475
30651521000,96pltrace0-21swapper/119:06:521
2786652980,56pltrace0-21swapper/719:05:147
2786652960,92pltrace0-21swapper/319:05:193
1804352920,2pltrace0-21swapper/121:36:481
2786652910,59pltrace0-21swapper/619:06:416
3057225844,10sleep40-21swapper/419:05:574
2846925844,10sleep00-21swapper/019:05:050
3026252300,2pltrace0-21swapper/723:00:157
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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