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2022-05-26 - 20:14

x86 Intel Xeon-E31220L @2200 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #5, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack5slot0.osadl.org (updated Fri May 20, 2022 00:44:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3170721600,0sleep231705-21sshd23:05:192
345721460,3sleep32914799cyclictest22:26:313
1438821400,1sleep214366-21sshd00:06:032
3078821390,0sleep130759-21sshd23:36:121
247321150,0sleep12471-21bash00:13:551
3201521050,1sleep10-21swapper/121:25:061
1749421050,2sleep117478-21sshd23:04:091
2520321020,3sleep02914499cyclictest21:54:590
2881529833,45sleep30-21swapper/319:09:063
112012960,2sleep211184-21sshd23:31:442
89132900,2sleep10-21swapper/122:49:231
60372890,2sleep21875-21nfsd22:35:092
181812890,0sleep00-21swapper/023:15:230
51922880,2sleep35176-21sshd22:01:353
280412880,2sleep128037-21sshd21:19:131
200472880,3sleep22914699cyclictest22:33:312
287342850,3sleep30-21swapper/323:05:073
260082850,2sleep20-21swapper/222:56:292
102692850,1sleep30-21swapper/321:39:553
100262850,2sleep20-21swapper/223:54:082
2868028433,39sleep10-21swapper/119:07:231
25182840,1sleep02504-21sshd22:37:390
15802840,2sleep11578-21sshd00:02:011
284862830,2sleep228481-21sshd00:10:192
125342820,1sleep012530-21sshd22:05:040
21092810,3sleep30-21swapper/321:11:203
157712810,1sleep015758-21sshd22:24:530
85942800,2sleep28593-21bash22:24:152
225402800,3sleep10-21swapper/123:27:061
260092790,1sleep00-21swapper/021:38:280
71202780,2sleep10-21swapper/121:47:551
225892780,2sleep30-21swapper/322:17:023
181232770,2sleep20-21swapper/221:23:552
28062750,2sleep30-21swapper/300:13:573
271912750,1sleep20-21swapper/221:38:332
189072750,3sleep30-21swapper/321:54:253
181062740,4sleep22914699cyclictest22:41:462
101662720,3sleep02914499cyclictest22:49:300
301612700,1sleep030163-21nfsd419:10:180
98742690,2sleep32914799cyclictest23:20:193
98742690,2sleep32914799cyclictest23:20:193
237082690,1sleep20-21swapper/221:29:562
219452680,4sleep32914799cyclictest23:01:433
27782650,0sleep00-21swapper/022:32:020
160392630,2sleep316038-21bash23:51:493
2886926031,16sleep20-21swapper/219:09:482
211212600,2sleep20-21swapper/222:11:192
2856424033,4sleep00-21swapper/019:06:070
234462380,0sleep323447-21id21:43:483
244312370,0sleep224432-21bash22:50:392
2914799350,7cyclictest0-21swapper/321:20:233
278812340,0sleep327882-21proc_pri23:30:213
2914799320,7cyclictest0-21swapper/300:07:403
152832310,4sleep12914599cyclictest22:13:401
82202300,4sleep12914599cyclictest23:51:071
154802301,27sleep2138550irq/27-eth023:23:432
154802301,27sleep2138550irq/27-eth023:23:432
142602300,3sleep114256-21sshd00:06:011
104272300,2sleep110411-21sshd23:11:551
191012290,1sleep30-21swapper/323:38:013
2914799277,2cyclictest0-21swapper/300:29:323
29145992722,3cyclictest1987-21sshd23:05:451
18802270,3sleep30-21swapper/322:12:293
323522260,24sleep1138550irq/27-eth021:52:481
2914799260,3cyclictest0-21swapper/322:23:173
2914799250,3cyclictest0-21swapper/323:11:373
2914799250,3cyclictest0-21swapper/321:32:113
268252250,7sleep30-21swapper/322:56:343
2914799248,2cyclictest0-21swapper/323:17:293
29147992411,2cyclictest0-21swapper/323:41:553
2914799240,10cyclictest0-21swapper/321:25:513
2914499240,22cyclictest15892-21sshd23:23:440
2914499240,22cyclictest15892-21sshd23:23:440
233922240,22sleep1138550irq/27-eth000:24:501
2914799238,3cyclictest0-21swapper/323:25:283
2914799238,3cyclictest0-21swapper/322:08:013
2914799238,2cyclictest0-21swapper/322:36:443
2914799238,2cyclictest0-21swapper/321:46:143
29147992311,1cyclictest0-21swapper/300:39:383
2914799230,21cyclictest24663-21sshd22:53:373
2914799230,21cyclictest0-21swapper/320:25:163
2914799230,10cyclictest0-21swapper/323:49:283
2914799230,10cyclictest0-21swapper/322:46:203
2914799230,10cyclictest0-21swapper/321:16:033
2914799230,10cyclictest0-21swapper/300:31:093
2914799230,10cyclictest0-21swapper/300:22:243
29145992316,4cyclictest0-21swapper/123:23:051
29145992316,4cyclictest0-21swapper/123:23:051
2914799220,9cyclictest0-21swapper/300:00:223
2914799220,3cyclictest0-21swapper/323:56:353
2914799220,2cyclictest0-21swapper/322:41:483
2914799220,10cyclictest0-21swapper/322:31:553
2914799220,10cyclictest0-21swapper/321:58:123
2914799220,10cyclictest0-21swapper/300:15:203
2914599224,3cyclictest27009-21bash22:20:121
2914599221,18cyclictest22-21ksoftirqd/123:55:121
2914599220,5cyclictest0-21swapper/122:52:591
2914499223,14cyclictest6570-21sshd21:28:270
2914499220,21cyclictest4938-21sshd23:14:190
2914499220,18cyclictest27215-21cp22:53:500
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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