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2024-06-21 - 13:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot0.osadl.org (updated Fri Jun 21, 2024 00:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2066221220,4sleep3168599cyclictest00:33:223
3133721210,2sleep30-21swapper/322:29:523
1255211734,45sleep30-21swapper/319:08:093
1202021170,3sleep0168299cyclictest22:52:370
278321000,2sleep30-21swapper/300:12:113
2394721000,1sleep00-21swapper/021:28:080
38162940,2sleep31926-21nfsd21:35:213
95032920,5sleep30-21swapper/323:50:513
263142920,4sleep12038-21sshd23:58:421
245962920,3sleep20-21swapper/222:01:412
305882890,2sleep21927-21nfsd21:59:172
144542890,1sleep014443-21df00:10:120
253922860,1sleep041ktimersoftd/022:35:210
130028633,49sleep10-21swapper/119:08:401
289032840,0sleep00-21swapper/023:58:580
164242830,3sleep30-21swapper/323:57:453
105942830,0sleep00-21swapper/023:04:470
135452820,2sleep10-21swapper/122:52:461
70322810,2sleep27031-21bash22:21:202
55182780,0sleep00-21swapper/021:59:580
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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