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2023-02-06 - 14:15

x86 Intel Xeon-E31220L @2200 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #5, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot0.osadl.org (updated Mon Feb 06, 2023 00:44:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2614821370,0sleep126150-21id23:49:371
549621360,1sleep31102699cyclictest23:25:313
2258921350,4sleep11101799cyclictest21:31:021
1495221290,1sleep30-21swapper/322:55:583
1162521290,4sleep31102699cyclictest21:54:533
3082721280,0sleep00-21swapper/000:35:500
2804021050,1sleep10-21swapper/121:20:291
99312940,3sleep20-21swapper/200:10:472
315982940,2sleep131597-21bash00:01:171
24062940,5sleep31102699cyclictest22:05:083
152282940,2sleep20-21swapper/222:20:012
287212930,2sleep228727-21sed23:05:262
240062930,6sleep3138550irq/27-eth021:25:403
275902920,4sleep20-21swapper/223:38:362
133512920,1sleep10-21swapper/121:16:321
1080329233,47sleep10-21swapper/119:09:151
131292910,1sleep00-21swapper/021:38:300
126402910,3sleep212639-21sshd22:52:592
324602880,3sleep01100899cyclictest21:53:540
45782870,1sleep30-21swapper/322:24:393
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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