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2022-10-04 - 02:51

x86 Intel Xeon-E31220L @2200 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #5, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot0.osadl.org (updated Mon Oct 03, 2022 12:44:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
944521490,5sleep0228999cyclictest11:09:200
1170221330,2sleep211697-21cp10:13:262
2277321270,1sleep00-21swapper/009:59:450
647521260,2sleep16474-21bash09:11:171
3276221240,1sleep232763-21sshd09:22:292
3115021230,4sleep1229099cyclictest09:54:371
2476321220,2sleep20-21swapper/209:15:522
2153821210,2sleep221525-21sshd10:17:162
523621200,2sleep10-21swapper/111:11:521
428121190,4sleep0228999cyclictest11:14:490
1047621080,1sleep10-21swapper/109:40:541
1767210432,43sleep10-21swapper/107:06:101
267572990,2sleep31987-21sshd09:39:323
38452940,2sleep33849-21id12:05:303
38452940,2sleep33849-21id12:05:293
303692920,2sleep30-21swapper/312:02:003
75522910,2sleep27547-21sshd11:35:542
101152900,3sleep30-21swapper/311:06:223
31428732,45sleep30-21swapper/307:05:153
213092870,1sleep30-21swapper/311:55:153
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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