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2021-01-16 - 06:29

Intel(R) Xeon(R) CPU E31220L @ 2.20GHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #5, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack5slot0.osadl.org (updated Sat Jan 16, 2021 00:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1215529636,55sleep10-21swapper/119:06:171
97392910,1sleep00-21swapper/000:11:470
58872910,1sleep10-21swapper/122:48:211
61232850,0sleep041ktimersoftd/021:10:310
58572830,2sleep10-21swapper/100:11:031
1210728332,46sleep30-21swapper/319:05:393
118812790,2sleep10-21swapper/121:22:261
72982780,3sleep10-21swapper/123:54:531
129462780,2sleep20-21swapper/221:11:452
307492770,1sleep10-21swapper/123:42:061
66542760,1sleep22116-21runrttasks22:04:582
111962740,2sleep111193-21bash00:06:261
178092730,1sleep30-21swapper/321:23:283
171632730,2sleep117160-21sshd23:23:191
195222720,2sleep319518-21sshd00:07:573
11902720,2sleep30-21swapper/322:09:283
305732710,2sleep10-21swapper/121:47:111
1238827133,9sleep20-21swapper/219:09:102
323212640,1sleep20-21swapper/223:25:452
1270299640,62cyclictest26050-21sleep22:29:593
111942630,1sleep10-21swapper/100:23:091
274532580,4sleep31270299cyclictest00:03:483
1245025732,13sleep00-21swapper/019:09:550
1269999503,5cyclictest19647-21sshd21:45:160
1269999491,46cyclictest8551-21sshd23:21:470
12699994339,3cyclictest13229-21sshd22:22:170
1270299400,35cyclictest137950irq/27-eth021:36:463
12699994036,3cyclictest27949-21sshd00:37:030
1269999400,39cyclictest3087-21sshd22:09:470
12699993734,2cyclictest30434-21perf19:50:000
12701993630,5cyclictest2536-21sadc20:00:002
152132350,0sleep00-21swapper/023:11:570
53762330,2sleep20-21swapper/223:21:122
312562330,6sleep03-21ksoftirqd/022:14:300
12699993122,6cyclictest18677-21sshd00:07:480
12702992923,1cyclictest8558-21sshd23:21:473
12699992824,3cyclictest24968-21perf20:50:000
12699992819,2cyclictest32667-21sshd23:04:020
309682270,2sleep20-21swapper/200:15:182
12699992719,1cyclictest137950irq/27-eth021:39:340
312362261,23sleep1137950irq/27-eth022:30:391
12699992612,7cyclictest0-21swapper/021:26:390
269842252,21sleep2137950irq/27-eth000:36:532
1270199253,9cyclictest0-21swapper/221:54:132
280982240,2sleep30-21swapper/322:35:323
1270199232,18cyclictest26820-21sshd23:41:232
227432220,20sleep2137950irq/27-eth022:45:342
197652220,20sleep3137950irq/27-eth023:01:463
1270199212,6cyclictest0-21swapper/221:35:252
1270199212,10cyclictest0-21swapper/222:29:492
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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