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2019-07-22 - 08:00

Intel(R) Core(TM) i7 CPU 975 @ 3.33GHz, Linux 3.2.44-rt65-32 (Profile)

Latency plot of system in rack #5, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -t7 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Mon Jul 22, 2019 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
436499171cyclictest0-21swapper/622:34:006
4364991615cyclictest0-21swapper/623:46:146
4364991615cyclictest0-21swapper/600:03:556
436499161cyclictest0-21swapper/622:22:136
436499161cyclictest0-21swapper/622:12:376
4363991615cyclictest0-21swapper/523:46:145
4363991615cyclictest0-21swapper/523:07:205
4363991615cyclictest0-21swapper/500:03:555
4362991615cyclictest0-21swapper/423:46:144
4362991615cyclictest0-21swapper/400:03:554
4357991615cyclictest0-21swapper/223:02:192
4341991615cyclictest0-21swapper/023:51:170
4341991615cyclictest0-21swapper/022:47:170
4341991615cyclictest0-21swapper/000:26:090
4341991615cyclictest0-21swapper/000:16:520
4341991615cyclictest0-21swapper/000:10:280
4341991615cyclictest0-21swapper/000:07:480
2446321615sleep70-21swapper/723:50:507
7850150irq/20-ata_piix331ksoftirqd/500:33:245
4364991511cyclictest0-21swapper/600:22:336
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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