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2024-09-13 - 07:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack5slot1.osadl.org (updated Fri Sep 13, 2024 00:44:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
534239166570,0EcMasterDemoSyn0-21swapper/519:47:145
1966539166230,0EcMasterDemoSyn0-21swapper/520:02:305
316583984090,0EcMasterDemoSyn0-21swapper/519:07:185
53403984080,0EcMasterDemoSyn0-21swapper/519:14:555
187313984060,0EcMasterDemoSyn0-21swapper/519:27:385
236803984050,0EcMasterDemoSyn0-21swapper/519:33:045
274933984030,0EcMasterDemoSyn0-21swapper/520:44:595
45173983980,0EcMasterDemoSyn0-21swapper/522:17:305
196903983950,0EcMasterDemoSyn0-21swapper/522:54:535
202113983930,0EcMasterDemoSyn0-21swapper/523:24:395
187593983910,0EcMasterDemoSyn0-21swapper/521:09:195
30503983900,0EcMasterDemoSyn0-21swapper/520:19:135
183923983890,0EcMasterDemoSyn0-21swapper/521:24:345
39823983880,0EcMasterDemoSyn0-21swapper/520:54:055
188213983860,0EcMasterDemoSyn0-21swapper/521:39:485
179633983860,0EcMasterDemoSyn0-21swapper/520:34:505
112543983850,0EcMasterDemoSyn0-21swapper/520:26:065
288073983840,0EcMasterDemoSyn0-21swapper/520:11:145
314803983830,1EcMasterDemoSyn0-21swapper/520:48:385
57703983820,0EcMasterDemoSyn0-21swapper/522:03:225
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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