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2024-04-26 - 13:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot2.osadl.org (updated Fri Apr 26, 2024 00:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
47872204189,11sleep10-21swapper/119:08:191
46412196180,11sleep30-21swapper/319:06:303
47912188170,13sleep00-21swapper/019:08:230
48852181164,12sleep20-21swapper/219:09:372
35202480,0sleep20-21swapper/222:28:342
120992460,0sleep10-21swapper/122:33:451
304892450,0sleep20-21swapper/223:43:072
237842450,0sleep00-21swapper/022:20:300
126712450,0sleep00-21swapper/023:51:340
120392420,0sleep10-21swapper/123:51:041
245422410,0sleep224544-21cpuspeed_turbos23:20:142
51049961,3cyclictest0-21swapper/100:00:091
51029960,3cyclictest26103-21munin-run21:25:020
51109955,0cyclictest19425-21kworker/3:123:06:583
51109955,0cyclictest19425-21kworker/3:122:55:463
51109955,0cyclictest19425-21kworker/3:121:37:253
51109955,0cyclictest19425-21kworker/3:120:30:143
51109955,0cyclictest19425-21kworker/3:119:45:283
51109955,0cyclictest19425-21kworker/3:100:36:343
51109954,1cyclictest17352-21grep00:35:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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