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2026-05-20 - 12:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot2.osadl.org (updated Wed May 20, 2026 00:44:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
165262198182,11sleep30-21swapper/319:06:013
167562187170,12sleep10-21swapper/119:08:591
165832181165,12sleep00-21swapper/019:06:460
165132166146,15sleep20-21swapper/219:05:512
20852450,0sleep00-21swapper/023:42:210
268102440,0sleep20-21swapper/221:15:432
276182160,0sleep1201rcuc/100:10:321
76282120,0sleep00-21swapper/021:22:290
170389980,6cyclictest0-21swapper/323:15:133
170309971,5cyclictest0-21swapper/221:25:112
170219960,5cyclictest0-21swapper/020:20:110
170389955,0cyclictest31135-21kworker/3:122:16:023
170389950,5cyclictest0-21swapper/323:41:543
170389950,5cyclictest0-21swapper/300:22:473
170389950,0cyclictest1016-21ssh22:06:273
170309955,0cyclictest0-21swapper/222:02:232
170309950,5cyclictest0-21swapper/220:50:112
170259951,2cyclictest0-21swapper/121:50:121
170259950,5cyclictest0-21swapper/122:01:101
170259950,5cyclictest0-21swapper/121:41:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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