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2025-06-23 - 20:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Mon Jun 23, 2025 12:50:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
197329140,46sleep10-21swapper/107:05:101
429628250,28sleep60-21swapper/607:06:126
428828147,30sleep00-21swapper/007:06:060
447027945,30sleep50-21swapper/507:08:435
446827844,29sleep30-21swapper/307:08:413
434627744,29sleep20-21swapper/207:06:562
427727743,30sleep70-21swapper/707:05:577
449627140,26sleep40-21swapper/407:09:064
199102550,0sleep20-21swapper/210:45:452
199692480,0sleep60-21swapper/611:49:066
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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