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2023-06-03 - 06:41

x86 Intel Xeon i3-1578L v5 @2000 MHz, Linux 4.19.246-rt110 (Profile)

Latency plot of system in rack #5, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot3.osadl.org (updated Sat Jun 03, 2023 00:50:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2021528368,10sleep70-21swapper/719:09:337
2005428349,30sleep30-21swapper/319:07:133
2009928235,42sleep10-21swapper/119:07:511
274312810,0sleep20-21swapper/223:43:192
2011827844,30sleep20-21swapper/219:08:082
2001727844,30sleep40-21swapper/419:06:424
2013027742,30sleep50-21swapper/519:08:195
2021427643,29sleep60-21swapper/619:09:326
2002227642,29sleep00-21swapper/019:06:470
271672670,0sleep40-21swapper/422:16:564
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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