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2023-02-06 - 14:36

x86 Intel Xeon i3-1578L v5 @2000 MHz, Linux 4.19.246-rt110 (Profile)

Latency plot of system in rack #5, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot3.osadl.org (updated Mon Feb 06, 2023 12:50:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27720994646,0cyclictest0-21swapper/612:20:256
27726994444,0cyclictest0-21swapper/707:30:357
2768199440,2cyclictest14019-21cut08:40:200
27708993937,1cyclictest0-21swapper/408:40:214
2772099340,0cyclictest0-21swapper/607:35:146
27701993432,1cyclictest0-21swapper/307:10:123
27726993333,0cyclictest0-21swapper/708:45:197
27695993333,0cyclictest0-21swapper/207:35:152
27713993030,0cyclictest0-21swapper/509:00:165
27708992929,0cyclictest0-21swapper/408:00:194
27708992929,0cyclictest0-21swapper/408:00:194
27681992924,4cyclictest9-21ksoftirqd/008:55:010
27726992827,0cyclictest0-21swapper/709:00:167
27713992826,1cyclictest14020-21cut08:40:205
27701992710,4cyclictest0-21swapper/308:45:193
27701992624,1cyclictest0-21swapper/308:50:183
2770199260,25cyclictest0-21swapper/308:35:243
27681992625,1cyclictest23139-21ls12:20:290
27713992525,0cyclictest0-21swapper/509:10:285
27701992525,0cyclictest0-21swapper/309:05:263
27695992510,5cyclictest0-21swapper/209:00:242
27689992518,3cyclictest0-21swapper/108:05:151
27726992424,0cyclictest0-21swapper/707:10:137
27726992410,4cyclictest0-21swapper/708:15:297
27713992423,1cyclictest0-21swapper/510:33:135
27701992424,0cyclictest0-21swapper/309:10:273
27726992323,0cyclictest0-21swapper/707:40:197
27726992310,5cyclictest0-21swapper/708:00:287
27726992310,5cyclictest0-21swapper/708:00:287
27689992323,0cyclictest0-21swapper/111:15:061
27689992323,0cyclictest0-21swapper/109:05:191
27689992310,13cyclictest0-21swapper/108:16:041
2768199233,0cyclictest121rcu_preempt09:12:170
27726992220,1cyclictest0-21swapper/707:35:027
27726992210,5cyclictest0-21swapper/708:50:187
27713992222,0cyclictest76350irq/125-eth008:47:555
27713992222,0cyclictest0-21swapper/508:35:215
27713992210,4cyclictest0-21swapper/507:40:235
2770899227,11cyclictest49-21ksoftirqd/408:55:014
27701992222,0cyclictest0-21swapper/307:30:163
27695992221,0cyclictest0-21swapper/207:10:122
27689992210,4cyclictest0-21swapper/107:35:011
2768199229,8cyclictest9-21ksoftirqd/008:55:200
27681992210,6cyclictest0-21swapper/009:00:260
27701992110,3cyclictest0-21swapper/308:00:233
27701992110,3cyclictest0-21swapper/308:00:233
2768199219,11cyclictest0-21swapper/009:10:000
2768199218,7cyclictest101ktimersoftd/008:45:290
27713992020,0cyclictest76350irq/125-eth008:53:325
27708992010,3cyclictest0-21swapper/409:11:474
27695992020,0cyclictest0-21swapper/209:10:172
27689992020,0cyclictest0-21swapper/112:13:471
27689992010,5cyclictest0-21swapper/107:10:151
27689992010,0cyclictest0-21swapper/110:15:411
27726991910,4cyclictest0-21swapper/708:55:277
27726991910,2cyclictest0-21swapper/709:12:097
27720991919,0cyclictest0-21swapper/612:16:546
27720991910,5cyclictest0-21swapper/609:16:326
27720991910,5cyclictest0-21swapper/608:45:266
2772099190,19cyclictest0-21swapper/610:54:186
27713991919,0cyclictest76350irq/125-eth012:04:465
27713991919,0cyclictest76350irq/125-eth009:19:455
27713991919,0cyclictest76350irq/125-eth007:35:235
27713991919,0cyclictest76350irq/125-eth007:14:285
2771399190,15cyclictest0-21swapper/508:55:265
27701991910,1cyclictest0-21swapper/309:15:063
27695991916,3cyclictest996-21snmpd12:15:072
27689991910,6cyclictest0-21swapper/108:59:591
27689991910,3cyclictest0-21swapper/109:00:151
27689991910,2cyclictest0-21swapper/109:14:081
27689991910,0cyclictest0-21swapper/108:02:151
27689991910,0cyclictest0-21swapper/108:02:151
2768999190,0cyclictest0-21swapper/107:20:241
27681991914,5cyclictest24408-21perl08:00:210
27681991914,5cyclictest24408-21perl08:00:210
27681991913,3cyclictest27672-21cyclictest09:16:010
27726991810,8cyclictest0-21swapper/712:15:427
27726991810,3cyclictest0-21swapper/712:20:297
27726991810,0cyclictest0-21swapper/707:45:137
27720991810,3cyclictest0-21swapper/608:50:246
27720991810,2cyclictest0-21swapper/608:55:176
27720991810,2cyclictest0-21swapper/607:40:246
27713991818,0cyclictest76350irq/125-eth011:07:175
27713991818,0cyclictest0-21swapper/508:00:195
27713991818,0cyclictest0-21swapper/508:00:195
27713991810,3cyclictest0-21swapper/508:15:275
2770899183,9cyclictest0-21swapper/407:40:234
27708991817,1cyclictest1004-21lldpd12:26:094
27708991810,4cyclictest0-21swapper/409:00:184
27701991810,4cyclictest0-21swapper/309:20:133
27701991810,2cyclictest0-21swapper/307:40:213
27695991815,3cyclictest996-21snmpd10:53:222
27695991810,3cyclictest0-21swapper/209:15:112
27695991810,2cyclictest0-21swapper/209:05:292
27689991810,5cyclictest0-21swapper/109:18:491
27689991810,2cyclictest0-21swapper/112:17:401
27689991810,2cyclictest0-21swapper/108:45:291
2768199187,11cyclictest0-21swapper/007:10:190
27681991814,4cyclictest1002-21sshd12:06:310
27681991813,4cyclictest729-21cron09:58:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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