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2022-10-04 - 13:03

x86 Intel Xeon i3-1578L v5 @2000 MHz, Linux 4.19.246-rt110 (Profile)

Latency plot of system in rack #5, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot3.osadl.org (updated Tue Oct 04, 2022 00:49:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
16101994840,7cyclictest0-21swapper/619:15:236
16073994242,0cyclictest0-21swapper/219:15:232
16061993938,0cyclictest0-21swapper/019:10:010
16101993810,18cyclictest0-21swapper/620:35:246
16101993737,0cyclictest26126-21strings20:25:196
1610799360,35cyclictest0-21swapper/720:05:197
1608299360,35cyclictest0-21swapper/320:05:193
16107993432,1cyclictest18777-21apt-get20:15:017
16101993413,20cyclictest0-21swapper/619:35:176
16101993410,23cyclictest0-21swapper/619:10:176
16082993331,1cyclictest0-21swapper/320:15:013
16073993331,1cyclictest0-21swapper/221:00:202
16065993333,0cyclictest0-21swapper/120:35:181
16061993310,5cyclictest0-21swapper/019:20:310
1609499320,0cyclictest0-21swapper/520:30:005
16065993131,0cyclictest0-21swapper/121:10:291
16089993030,0cyclictest0-21swapper/421:10:244
1608299308,5cyclictest121rcu_preempt20:25:243
16061993030,0cyclictest0-21swapper/020:10:220
16101992927,1cyclictest9970-21needreboot19:55:216
16107992824,3cyclictest19709-21apt-get19:15:247
16082992823,4cyclictest0-21swapper/319:15:243
16082992816,8cyclictest401ktimersoftd/319:20:233
16073992810,8cyclictest0-21swapper/220:35:242
1610799275,10cyclictest73-21ksoftirqd/720:35:247
16073992719,3cyclictest0-21swapper/220:40:262
16065992726,0cyclictest0-21swapper/120:15:141
1610799269,9cyclictest721ktimersoftd/719:20:257
16101992610,15cyclictest0-21swapper/621:02:356
1606199264,12cyclictest121rcu_preempt20:30:000
16107992512,13cyclictest0-21swapper/720:45:007
16101992410,6cyclictest0-21swapper/620:40:266
1608299247,13cyclictest401ktimersoftd/320:35:243
16082992411,12cyclictest0-21swapper/320:45:013
16073992424,0cyclictest0-21swapper/223:52:542
16107992316,3cyclictest73-21ksoftirqd/720:25:237
16101992322,0cyclictest0-21swapper/619:25:186
16082992321,2cyclictest0-21swapper/320:10:253
16065992321,1cyclictest0-21swapper/120:40:211
16061992310,3cyclictest0-21swapper/020:35:230
16101992210,10cyclictest0-21swapper/623:47:006
16094992222,0cyclictest0-21swapper/520:35:185
16094992221,1cyclictest0-21swapper/521:10:295
16089992221,1cyclictest0-21swapper/419:10:014
16073992222,0cyclictest0-21swapper/200:32:032
16073992210,6cyclictest0-21swapper/220:25:232
16082992110,10cyclictest18697-21sed21:10:293
16065992119,2cyclictest1004-21lldpd23:04:201
16065992110,5cyclictest0-21swapper/120:30:001
16061992121,0cyclictest0-21swapper/022:30:500
16061992117,3cyclictest30588-21kworker/0:120:30:010
1610799209,6cyclictest0-21swapper/720:10:257
16107992011,8cyclictest711rcuc/721:10:297
16101992010,8cyclictest0-21swapper/623:39:516
16101992010,8cyclictest0-21swapper/623:30:436
16101992010,8cyclictest0-21swapper/622:56:536
16101992010,8cyclictest0-21swapper/622:37:076
16101992010,8cyclictest0-21swapper/600:06:146
16101992010,7cyclictest0-21swapper/621:36:426
16101992010,7cyclictest0-21swapper/621:36:426
16094992010,3cyclictest0-21swapper/521:05:155
16089992020,0cyclictest0-21swapper/400:20:234
16082992011,7cyclictest41-21ksoftirqd/319:35:163
16073992010,9cyclictest0-21swapper/221:10:292
16061992020,0cyclictest0-21swapper/020:05:190
16061992019,1cyclictest726-21avahi-daemon21:52:000
16061992010,2cyclictest0-21swapper/021:05:160
16101991910,9cyclictest0-21swapper/600:19:086
16101991910,7cyclictest27611-21ssh00:11:176
16101991910,7cyclictest20134-21ssh21:11:256
16101991910,7cyclictest0-21swapper/623:56:236
16101991910,7cyclictest0-21swapper/622:15:266
16101991910,7cyclictest0-21swapper/600:31:346
16101991910,7cyclictest0-21swapper/600:26:366
16101991910,7cyclictest0-21swapper/600:00:026
16101991910,6cyclictest27899-21ssh21:15:596
16101991910,3cyclictest3166-21ls00:35:236
16082991910,7cyclictest41-21ksoftirqd/319:25:183
16073991919,0cyclictest0-21swapper/200:28:122
16073991910,6cyclictest0-21swapper/219:55:242
16065991910,3cyclictest0-21swapper/120:10:231
16061991910,4cyclictest0-21swapper/021:10:290
16107991813,5cyclictest0-21swapper/719:25:177
16101991811,6cyclictest0-21swapper/620:15:016
16101991810,7cyclictest0-21swapper/622:29:576
16101991810,6cyclictest0-21swapper/623:50:066
16101991810,6cyclictest0-21swapper/623:10:096
16101991810,6cyclictest0-21swapper/619:30:256
16101991810,5cyclictest16457-21ssh23:05:536
16101991810,5cyclictest0-21swapper/623:43:356
16101991810,5cyclictest0-21swapper/622:11:076
16101991810,5cyclictest0-21swapper/621:48:476
16101991810,5cyclictest0-21swapper/621:31:426
16101991810,5cyclictest0-21swapper/621:23:016
16101991810,5cyclictest0-21swapper/620:32:166
16101991810,4cyclictest0-21swapper/623:28:386
16101991810,4cyclictest0-21swapper/623:01:176
16101991810,4cyclictest0-21swapper/622:21:046
16101991810,2cyclictest0-21swapper/600:23:146
16094991810,2cyclictest0-21swapper/520:15:015
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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