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2023-06-04 - 23:30

x86 Intel Xeon i3-1578L v5 @2000 MHz, Linux 4.19.246-rt110 (Profile)

Latency plot of system in rack #5, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot3.osadl.org (updated Sun Jun 04, 2023 12:50:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
271612850,0sleep30-21swapper/307:20:003
2000728551,30sleep50-21swapper/507:08:115
1808428378,2sleep70-21swapper/707:05:157
2000528147,29sleep30-21swapper/307:08:083
2008127743,30sleep20-21swapper/207:09:112
1996727743,30sleep40-21swapper/407:07:374
2004027541,30sleep00-21swapper/007:08:380
1987627542,29sleep60-21swapper/607:06:186
1846427338,30sleep10-21swapper/107:05:181
136012490,0sleep00-21swapper/011:02:400
195532480,0sleep60-21swapper/608:00:226
68222460,0sleep40-21swapper/410:59:324
170362460,0sleep50-21swapper/511:56:345
264212440,0sleep00-21swapper/010:17:230
260222440,0sleep60-21swapper/611:44:496
321412430,0sleep30-21swapper/308:20:213
20569993410,23cyclictest0-21swapper/307:10:203
20568992929,0cyclictest28271-21diskmemload12:12:512
20566992722,3cyclictest3669-21sleep07:39:540
20569992323,0cyclictest0-21swapper/309:35:143
20566992323,0cyclictest0-21swapper/011:44:170
20571992217,5cyclictest1-21systemd10:41:065
267372210,0sleep00-21swapper/009:43:120
20573992118,3cyclictest1650-21ntpd12:09:477
20567992121,0cyclictest0-21swapper/110:51:291
20567992121,0cyclictest0-21swapper/107:10:211
20568992020,0cyclictest0-21swapper/208:55:372
20567992019,1cyclictest0-21swapper/109:37:461
20571991910,2cyclictest0-21swapper/508:00:315
20568991919,0cyclictest0-21swapper/212:28:302
20566991916,3cyclictest0-21swapper/009:48:040
20573991818,0cyclictest0-21swapper/710:05:027
20567991815,1cyclictest28271-21diskmemload12:17:441
20566991810,0cyclictest0-21swapper/011:34:230
464021710,3sleep70-21swapper/708:30:197
20573991715,2cyclictest1650-21ntpd08:04:097
20573991714,1cyclictest721ktimersoftd/710:20:017
20573991710,4cyclictest0-21swapper/712:34:337
20572991711,0cyclictest71950irq/125-eth009:33:236
20571991710,7cyclictest0-21swapper/512:23:345
20571991710,0cyclictest0-21swapper/509:43:295
20570991710,2cyclictest0-21swapper/408:00:324
20568991710,4cyclictest0-21swapper/208:05:152
20568991710,0cyclictest0-21swapper/211:20:262
20566991710,0cyclictest0-21swapper/011:35:270
306612160,0sleep50-21swapper/510:02:235
20573991615,1cyclictest691-21avahi-daemon09:11:207
20573991614,0cyclictest5773-21ssh11:15:297
20573991612,4cyclictest691-21avahi-daemon07:30:287
20573991610,0cyclictest0-21swapper/710:35:257
20572991616,0cyclictest71950irq/125-eth012:11:306
20572991616,0cyclictest71950irq/125-eth008:43:116
20572991615,1cyclictest762-21in:imuxsock11:04:446
20572991615,1cyclictest71950irq/125-eth012:35:386
20572991615,1cyclictest71950irq/125-eth012:06:056
20572991614,1cyclictest27666-21sh11:10:246
20571991613,0cyclictest99-21kswapd011:40:275
20571991610,0cyclictest0-21swapper/512:38:265
20571991610,0cyclictest0-21swapper/511:46:145
20571991610,0cyclictest0-21swapper/510:56:465
20571991610,0cyclictest0-21swapper/510:10:545
20570991614,2cyclictest0-21swapper/407:46:004
20570991610,6cyclictest0-21swapper/412:22:084
20570991610,1cyclictest0-21swapper/409:15:354
20570991610,0cyclictest0-21swapper/411:45:274
20570991610,0cyclictest0-21swapper/411:42:424
20570991610,0cyclictest0-21swapper/410:46:124
2056999165,5cyclictest693-21irqbalance10:39:353
20569991610,6cyclictest0-21swapper/312:25:373
20569991610,0cyclictest0-21swapper/312:15:293
20567991610,2cyclictest0-21swapper/108:00:281
20566991612,0cyclictest26877-21ls09:25:280
20566991610,0cyclictest0-21swapper/012:36:070
20573991512,3cyclictest1650-21ntpd11:32:517
20573991511,3cyclictest1650-21ntpd10:42:277
20573991510,5cyclictest0-21swapper/711:52:087
20573991510,5cyclictest0-21swapper/710:50:417
20573991510,0cyclictest0-21swapper/712:24:427
20573991510,0cyclictest0-21swapper/711:24:557
20573991510,0cyclictest0-21swapper/711:01:207
20573991510,0cyclictest0-21swapper/710:10:277
20572991513,0cyclictest71950irq/125-eth009:41:336
20572991511,1cyclictest205-21md0_raid112:15:286
20572991510,5cyclictest0-21swapper/611:51:326
20572991510,3cyclictest0-21swapper/610:50:246
20572991510,2cyclictest0-21swapper/609:05:206
20572991510,0cyclictest0-21swapper/612:31:556
20572991510,0cyclictest0-21swapper/612:00:346
20572991510,0cyclictest0-21swapper/611:05:256
20572991510,0cyclictest0-21swapper/610:44:256
20572991510,0cyclictest0-21swapper/609:48:396
2057199151,6cyclictest0-21swapper/508:05:155
20571991514,1cyclictest22819-21ls10:15:225
20571991510,2cyclictest0-21swapper/510:25:315
20571991510,0cyclictest0-21swapper/509:49:265
20570991514,1cyclictest6579-1kworker/u17:112:26:324
20570991510,5cyclictest0-21swapper/411:23:414
20570991510,5cyclictest0-21swapper/410:14:154
20570991510,0cyclictest0-21swapper/411:12:314
20570991510,0cyclictest0-21swapper/409:45:074
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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