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2023-01-29 - 07:27

x86 Intel Xeon i3-1578L v5 @2000 MHz, Linux 4.19.246-rt110 (Profile)

Latency plot of system in rack #5, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot3.osadl.org (updated Sun Jan 29, 2023 00:50:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15627994646,0cyclictest0-21swapper/520:05:195
15624994444,0cyclictest0-21swapper/221:30:362
15629994141,0cyclictest0-21swapper/720:55:217
15624993737,0cyclictest0-21swapper/200:20:292
15628993534,0cyclictest0-21swapper/621:55:276
15624993434,0cyclictest0-21swapper/222:47:532
15623993433,0cyclictest0-21swapper/120:35:141
1562999320,31cyclictest0-21swapper/719:15:197
15628993231,0cyclictest18728-21apt-get23:50:156
15623993210,21cyclictest0-21swapper/122:55:021
15622993231,0cyclictest0-21swapper/021:30:360
15626993129,1cyclictest0-21swapper/419:55:144
15623993126,4cyclictest2473-21turbostat00:40:001
15623993121,4cyclictest121rcu_preempt00:20:311
15625993029,0cyclictest0-21swapper/319:40:173
15624993030,0cyclictest0-21swapper/223:00:242
15624993028,1cyclictest0-21swapper/200:30:242
15623993026,2cyclictest121rcu_preempt23:47:201
15623993019,8cyclictest14705-21kworker/1:000:11:551
15622993030,0cyclictest0-21swapper/019:10:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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