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2023-12-03 - 12:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot3.osadl.org (updated Sun Dec 03, 2023 00:50:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2324429691,2sleep20-21swapper/219:05:192
2532428349,29sleep30-21swapper/319:09:463
2522428248,29sleep60-21swapper/619:08:206
2526627944,30sleep10-21swapper/119:08:551
2518927946,28sleep70-21swapper/719:07:497
2513527944,30sleep00-21swapper/019:07:010
2521327843,30sleep40-21swapper/419:08:104
2510427845,29sleep50-21swapper/519:06:355
256532540,0sleep50-21swapper/523:56:025
87892480,0sleep70-21swapper/722:50:147
62312480,2sleep52577699cyclictest23:08:295
263522440,0sleep00-21swapper/023:00:150
303592430,0sleep60-21swapper/622:42:216
123462410,0sleep20-21swapper/222:51:382
2717321510,4sleep50-21swapper/520:56:525
25778991513,1cyclictest981-21diskmemload21:30:347
25776991510,5cyclictest0-21swapper/500:34:225
25776991510,5cyclictest0-21swapper/500:18:305
25776991510,0cyclictest0-21swapper/523:51:595
25774991510,5cyclictest0-21swapper/322:45:353
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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