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2022-10-03 - 14:08

x86 Intel Xeon i3-1578L v5 @2000 MHz, Linux 4.19.246-rt110 (Profile)

Latency plot of system in rack #5, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot3.osadl.org (updated Mon Oct 03, 2022 12:49:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6946995410,44cyclictest0-21swapper/008:05:150
6963994110,31cyclictest0-21swapper/510:10:305
694699390,0cyclictest0-21swapper/009:00:170
6974993737,0cyclictest0-21swapper/708:25:157
6970993635,0cyclictest0-21swapper/612:25:246
6950993636,0cyclictest0-21swapper/308:55:133
696399350,1cyclictest0-21swapper/508:20:155
694699340,33cyclictest0-21swapper/009:05:240
695799330,0cyclictest0-21swapper/409:05:244
6948993333,0cyclictest0-21swapper/207:55:212
6974993131,0cyclictest0-21swapper/710:14:597
694699310,31cyclictest0-21swapper/008:35:020
6974992929,0cyclictest8653-21strings07:10:197
6950992929,0cyclictest0-21swapper/310:15:053
6950992928,1cyclictest0-21swapper/312:30:123
6957992828,0cyclictest0-21swapper/407:20:014
6970992727,0cyclictest0-21swapper/608:00:206
6963992710,8cyclictest0-21swapper/510:15:135
6963992610,4cyclictest0-21swapper/507:15:375
6957992626,0cyclictest0-21swapper/408:20:154
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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