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2024-04-18 - 19:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot3.osadl.org (updated Thu Apr 18, 2024 12:50:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3188429187,2sleep00-21swapper/007:05:250
3188429187,2sleep00-21swapper/007:05:240
3208528450,29sleep20-21swapper/207:05:272
3208528450,29sleep20-21swapper/207:05:272
3226428147,30sleep30-21swapper/307:08:003
3226428147,30sleep30-21swapper/307:08:003
3239327743,29sleep10-21swapper/107:09:511
3239327743,29sleep10-21swapper/107:09:511
3214727742,30sleep70-21swapper/707:06:207
3214727742,30sleep70-21swapper/707:06:207
3211827643,29sleep60-21swapper/607:05:556
3211827643,29sleep60-21swapper/607:05:556
3052827644,26sleep50-21swapper/507:05:145
3052827644,26sleep50-21swapper/507:05:145
3215327542,28sleep40-21swapper/407:06:254
3215327542,28sleep40-21swapper/407:06:254
55512530,0sleep40-21swapper/407:15:134
238762480,0sleep00-21swapper/010:13:320
139592460,0sleep613961-21latency_hist10:45:006
163382450,0sleep40-21swapper/410:45:224
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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