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2023-06-05 - 02:05

x86 Intel Core i7-E610 @2530 MHz, Linux 4.9.271-rt182 (Profile)

Latency plot of system in rack #5, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a -t3 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot4.osadl.org (updated Sun Jun 04, 2023 12:44:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5352212766,6sleep00-21swapper/007:05:370
5640212263,7sleep20-21swapper/207:09:202
5644211866,9sleep10-21swapper/107:09:231
56022111101,7sleep30-21swapper/307:08:533
191042630,0sleep10-21swapper/110:35:091
65562570,1sleep30-21swapper/307:10:243
300112570,0sleep30-21swapper/309:14:113
68082560,0sleep30-21swapper/309:19:203
263392560,2sleep326334-21ps12:05:273
196252560,0sleep20-21swapper/212:32:502
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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