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2023-02-06 - 07:24

x86 Intel Core i7-E610 @2530 MHz, Linux 4.9.271-rt182 (Profile)

Latency plot of system in rack #5, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a -t3 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot4.osadl.org (updated Mon Feb 06, 2023 00:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15714212565,8sleep00-21swapper/019:09:200
15444212563,8sleep10-21swapper/119:05:481
15691210596,6sleep20-21swapper/219:09:022
15436210091,6sleep30-21swapper/319:05:423
118682940,0sleep30-21swapper/323:52:243
149632670,0sleep10-21swapper/122:35:201
149632670,0sleep10-21swapper/122:35:191
225152660,0sleep20-21swapper/223:41:022
59572630,0sleep10-21swapper/100:05:211
100832600,0sleep30-21swapper/323:20:363
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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