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2022-07-03 - 04:40

x86 Intel Core i7-E610 @2530 MHz, Linux 4.9.271-rt182 (Profile)

Latency plot of system in rack #5, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a -t3 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot4.osadl.org (updated Sun Jul 03, 2022 00:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
25135212261,6sleep00-21swapper/019:06:080
25329211957,7sleep10-21swapper/119:08:371
25174210696,7sleep20-21swapper/219:06:382
2510328878,7sleep30-21swapper/319:05:433
14452810,0sleep10-21swapper/123:15:131
259502730,0sleep00-21swapper/023:10:200
266392660,1sleep10-21swapper/120:25:221
266392660,1sleep10-21swapper/120:25:221
236462610,1sleep223650-21aten2_r5power_v23:10:132
216672610,1sleep30-21swapper/319:30:183
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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