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2022-01-23 - 19:35

Intel(R) Core(TM) i7 CPU E 610 @ 2.53GHz, Linux 5.4.123-rt59 (Profile)

Latency plot of system in rack #5, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot4.osadl.org (updated Sun Jan 23, 2022 12:44:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1466729889,5sleep10-21swapper/107:07:151
1354729074,10sleep30-21swapper/307:05:243
1475528374,5sleep20-21swapper/207:08:242
1477827757,15sleep00-21swapper/007:08:420
160432750,0sleep20-21swapper/212:35:272
79132680,1sleep07914-21expr12:30:160
309462670,1sleep230947-21sh09:27:342
286452660,0sleep30-21swapper/309:47:433
146702640,0sleep30-21swapper/310:21:463
150632510,0sleep10-21swapper/111:28:551
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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