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2021-10-27 - 00:16

Intel(R) Core(TM) i7 CPU E 610 @ 2.53GHz, Linux 5.15.0-rc4-rt7 (Profile)

Latency plot of system in rack #5, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot4.osadl.org (updated Tue Jul 06, 2021 12:44:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2611629990,5sleep20-21swapper/207:07:302
2611928273,5sleep00-21swapper/007:07:310
186372750,1sleep1231ktimersoftd/112:03:521
186372750,1sleep1231ktimersoftd/112:03:521
2620127457,13sleep30-21swapper/307:08:353
225782740,0sleep20-21swapper/211:00:352
2619427257,10sleep10-21swapper/107:08:291
159142710,1sleep00-21swapper/012:01:280
159142710,1sleep00-21swapper/012:01:270
146342700,1sleep20-21swapper/209:30:182
178382690,0sleep20-21swapper/210:58:022
17592520,0sleep30-21swapper/307:25:293
186572310,0sleep018658-21ssh10:58:430
316272260,0sleep331628-21ssh11:29:083
2656799251,16cyclictest8064-21ssh11:35:102
2656799232,19cyclictest0-21swapper/210:10:172
2656699229,12cyclictest0-21swapper/109:56:481
2656699226,14cyclictest30317-21ssh12:33:321
154402220,1sleep10-21swapper/109:51:521
2656699216,2cyclictest28438-21ssh11:48:421
2656699216,2cyclictest13453-21ssh11:16:151
2656699216,13cyclictest9521-21ssh11:57:221
2656699216,13cyclictest0-21swapper/111:05:281
35502200,0sleep20-21swapper/209:44:532
2656799201,3cyclictest15160-21ssh10:35:102
2656699206,8cyclictest7887-21ssh09:46:581
2656699206,8cyclictest0-21swapper/111:43:321
2656699206,8cyclictest0-21swapper/110:55:021
2656699206,13cyclictest0-21swapper/112:17:551
2656699206,13cyclictest0-21swapper/111:02:441
2656699206,13cyclictest0-21swapper/110:42:481
2656699206,13cyclictest0-21swapper/110:31:341
2656699206,13cyclictest0-21swapper/109:34:461
2656699205,9cyclictest21985-21ssh10:39:451
2656699205,9cyclictest13555-21ssh11:38:391
2656699205,14cyclictest0-21swapper/112:05:501
2656699204,14cyclictest0-21swapper/110:54:581
26566992017,2cyclictest0-21swapper/110:14:451
2656699200,1cyclictest0-21swapper/112:26:121
2656699196,8cyclictest0-21swapper/109:24:551
2656699196,12cyclictest0-21swapper/110:07:011
2656699195,8cyclictest0-21swapper/112:37:061
2656699195,13cyclictest0-21swapper/111:22:511
2656699195,13cyclictest0-21swapper/110:48:231
2656699195,13cyclictest0-21swapper/110:24:481
2656699195,13cyclictest0-21swapper/110:24:471
2656699195,13cyclictest0-21swapper/109:15:101
2656699185,8cyclictest0-21swapper/110:00:351
2656699185,12cyclictest0-21swapper/110:27:241
2656699185,12cyclictest0-21swapper/109:28:131
2656699184,9cyclictest0-21swapper/112:24:311
2656699184,13cyclictest0-21swapper/109:42:201
2656899171,11cyclictest0-21swapper/309:57:003
2656699176,10cyclictest0-21swapper/111:51:551
26566991714,2cyclictest0-21swapper/109:13:091
26565991714,2cyclictest198050irq/24-eth012:20:100
26565991714,2cyclictest198050irq/24-eth012:11:000
26565991714,2cyclictest198050irq/24-eth011:38:120
26565991714,2cyclictest198050irq/24-eth011:26:550
26565991714,2cyclictest198050irq/24-eth011:18:370
26565991714,2cyclictest198050irq/24-eth011:10:170
26565991714,2cyclictest198050irq/24-eth011:08:180
26565991714,2cyclictest198050irq/24-eth011:02:390
26565991714,2cyclictest198050irq/24-eth010:47:200
26565991714,2cyclictest198050irq/24-eth010:29:160
26565991714,2cyclictest198050irq/24-eth010:24:550
26565991714,2cyclictest198050irq/24-eth010:24:550
26565991714,2cyclictest198050irq/24-eth010:15:480
26565991714,2cyclictest198050irq/24-eth009:34:060
26565991714,2cyclictest198050irq/24-eth009:25:000
26565991714,2cyclictest198050irq/24-eth009:21:310
26565991714,2cyclictest198050irq/24-eth009:13:580
26565991713,2cyclictest198050irq/24-eth009:52:030
2656899160,14cyclictest0-21swapper/311:40:173
2656899160,14cyclictest0-21swapper/308:51:013
2656799162,10cyclictest3000-21ssh10:48:172
26567991612,2cyclictest0-21swapper/210:50:162
2656799160,14cyclictest0-21swapper/212:35:112
2656699167,7cyclictest0-21swapper/111:11:221
26566991614,1cyclictest0-21swapper/112:10:371
26565991614,1cyclictest198050irq/24-eth012:30:330
26565991614,1cyclictest198050irq/24-eth010:35:090
26565991614,1cyclictest198050irq/24-eth009:55:340
26565991613,2cyclictest198050irq/24-eth012:35:090
26565991613,2cyclictest198050irq/24-eth012:28:150
26565991613,2cyclictest198050irq/24-eth012:17:400
26565991613,2cyclictest198050irq/24-eth012:08:250
26565991613,2cyclictest198050irq/24-eth011:55:140
26565991613,2cyclictest198050irq/24-eth011:52:150
26565991613,2cyclictest198050irq/24-eth011:47:130
26565991613,2cyclictest198050irq/24-eth011:41:150
26565991613,2cyclictest198050irq/24-eth011:31:060
26565991613,2cyclictest198050irq/24-eth010:52:560
26565991613,2cyclictest198050irq/24-eth010:41:440
26565991613,2cyclictest198050irq/24-eth010:32:290
26565991613,2cyclictest198050irq/24-eth010:11:210
26565991613,2cyclictest198050irq/24-eth010:05:470
26565991613,2cyclictest198050irq/24-eth010:00:440
26565991613,2cyclictest198050irq/24-eth009:40:390
26565991613,2cyclictest198050irq/24-eth009:39:450
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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