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2022-05-26 - 23:41

x86 Intel Core i7-E610 @2530 MHz, Linux 4.9.271-rt182 (Profile)

Latency plot of system in rack #5, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a -t3 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot4.osadl.org (updated Fri May 20, 2022 00:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24967211861,6sleep20-21swapper/219:06:512
24892210190,8sleep10-21swapper/119:05:541
2501528777,7sleep30-21swapper/319:07:293
1954128575,7sleep00-21swapper/019:05:090
298122760,0sleep30-21swapper/300:35:193
51982650,0sleep30-21swapper/321:05:183
21052650,0sleep20-21swapper/200:39:022
76122640,0sleep00-21swapper/021:05:190
316162600,0sleep20-21swapper/221:35:052
52972310,0sleep05295-21ssh22:05:280
2538799281,26cyclictest0-21swapper/120:37:121
2538799281,26cyclictest0-21swapper/100:13:201
2538799280,27cyclictest0-21swapper/121:58:151
25392992723,3cyclictest0-21swapper/219:39:192
2539299270,26cyclictest0-21swapper/223:02:032
2539299270,26cyclictest0-21swapper/221:22:472
2539299270,26cyclictest0-21swapper/220:41:202
2538799271,25cyclictest0-21swapper/122:36:421
2538799270,26cyclictest0-21swapper/123:46:311
2538799270,26cyclictest0-21swapper/123:41:001
2538799270,26cyclictest0-21swapper/123:23:491
2538799270,26cyclictest0-21swapper/122:27:001
2538799270,26cyclictest0-21swapper/121:28:251
2538799270,26cyclictest0-21swapper/120:50:411
2538799270,26cyclictest0-21swapper/120:27:381
2538799270,26cyclictest0-21swapper/120:16:441
2538799270,26cyclictest0-21swapper/119:48:341
2538799270,26cyclictest0-21swapper/119:43:511
2538799270,26cyclictest0-21swapper/100:27:321
2538799270,26cyclictest0-21swapper/100:07:371
2539299260,25cyclictest0-21swapper/222:31:292
2539299260,25cyclictest0-21swapper/220:05:222
25387992610,15cyclictest0-21swapper/121:50:041
2538799260,25cyclictest0-21swapper/123:08:311
2538799260,25cyclictest0-21swapper/119:20:121
2538799260,25cyclictest0-21swapper/100:32:191
25392992523,2cyclictest0-21swapper/223:36:132
2539299250,24cyclictest0-21swapper/223:00:012
2538799258,16cyclictest0-21swapper/123:31:321
25387992523,2cyclictest0-21swapper/120:14:261
2538799250,24cyclictest0-21swapper/123:04:021
2538799250,24cyclictest0-21swapper/122:06:011
2538799250,24cyclictest0-21swapper/120:20:371
2538799250,24cyclictest0-21swapper/100:37:341
2538799250,24cyclictest0-21swapper/100:22:041
2539299240,23cyclictest0-21swapper/221:28:132
25387992422,2cyclictest0-21swapper/122:42:201
25387992422,2cyclictest0-21swapper/122:42:201
25387992417,7cyclictest0-21swapper/119:29:071
2538799240,23cyclictest0-21swapper/123:17:401
2538799240,23cyclictest0-21swapper/122:55:261
2538799240,23cyclictest0-21swapper/122:16:281
2538799240,23cyclictest0-21swapper/122:00:491
2538799240,23cyclictest0-21swapper/121:49:461
2538799240,23cyclictest0-21swapper/121:07:131
2538799240,1cyclictest0-21swapper/123:54:001
2538799240,18cyclictest0-21swapper/123:37:111
2538799240,18cyclictest0-21swapper/121:40:221
2538799240,18cyclictest0-21swapper/121:31:351
2538799240,18cyclictest0-21swapper/121:18:591
25392992319,3cyclictest0-21swapper/220:56:472
2539299231,21cyclictest0-21swapper/220:47:502
2539299231,15cyclictest0-21swapper/221:10:202
25392992311,2cyclictest528-21kworker/2:223:12:112
2538799230,23cyclictest0-21swapper/119:16:011
2538799230,22cyclictest0-21swapper/123:55:571
2538799230,22cyclictest0-21swapper/123:25:151
2538799230,22cyclictest0-21swapper/123:13:521
2538799230,22cyclictest0-21swapper/122:53:091
2538799230,22cyclictest0-21swapper/122:46:291
2538799230,22cyclictest0-21swapper/122:30:401
2538799230,22cyclictest0-21swapper/122:21:161
2538799230,22cyclictest0-21swapper/122:10:221
2538799230,22cyclictest0-21swapper/121:35:491
2538799230,22cyclictest0-21swapper/121:20:271
2538799230,22cyclictest0-21swapper/121:12:131
2539299223,17cyclictest0-21swapper/200:05:112
25392992219,2cyclictest743-21snmpd22:10:182
2539299221,2cyclictest10546-21munin-run23:25:012
2539299221,20cyclictest0-21swapper/223:05:082
2539299220,21cyclictest0-21swapper/222:44:512
2539299220,21cyclictest0-21swapper/222:44:502
2539299220,21cyclictest0-21swapper/222:16:562
2538799221,20cyclictest0-21swapper/121:03:461
2538799220,21cyclictest0-21swapper/120:45:401
2538799220,21cyclictest0-21swapper/120:03:041
2538799220,21cyclictest0-21swapper/119:56:301
2538799220,21cyclictest0-21swapper/119:12:281
2538799220,21cyclictest0-21swapper/100:18:141
2538799220,21cyclictest0-21swapper/100:02:201
2538499224,17cyclictest0-21swapper/022:54:340
25384992219,2cyclictest743-21snmpd20:40:020
2538499220,21cyclictest0-21swapper/022:41:390
2538499220,21cyclictest0-21swapper/022:41:380
2539299212,13cyclictest17209-21sh23:26:062
2539299212,13cyclictest0-21swapper/200:00:572
25392992118,2cyclictest743-21snmpd00:15:492
25392992118,2cyclictest15494-21ssh00:12:042
2539299211,5cyclictest0-21swapper/222:20:352
2539299211,3cyclictest0-21swapper/219:58:122
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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