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2022-08-11 - 16:15

x86 Intel Core i7-E610 @2530 MHz, Linux 4.9.271-rt182 (Profile)

Latency plot of system in rack #5, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a -t3 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 100, highest latencies:
System rack5slot4.osadl.org (updated Thu Aug 11, 2022 12:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2769421120,2sleep20-21swapper/207:05:202
28813210895,8sleep10-21swapper/107:05:241
28628210895,8sleep30-21swapper/307:05:223
2876029180,6sleep00-21swapper/007:05:230
266262670,0sleep10-21swapper/110:00:261
202852620,0sleep30-21swapper/312:36:383
144282620,0sleep30-21swapper/310:58:523
141992620,0sleep20-21swapper/211:30:242
209352590,5sleep12984199cyclictest12:37:231
81712580,1sleep30-21swapper/310:08:333
75332580,1sleep30-21swapper/309:51:223
49412580,0sleep04944-21kthreadcore08:05:220
70862560,0sleep20-21swapper/211:10:212
110002530,1sleep30-21swapper/311:28:483
2984199340,17cyclictest0-21swapper/109:35:181
29841993215,16cyclictest0-21swapper/112:33:511
29836993224,7cyclictest743-21snmpd09:00:280
2983699300,28cyclictest0-21swapper/011:59:070
2984399290,1cyclictest0-21swapper/212:05:142
2983699296,4cyclictest0-21swapper/010:52:450
2983699290,26cyclictest0-21swapper/012:33:540
2984399280,27cyclictest0-21swapper/211:28:312
2984199280,27cyclictest0-21swapper/111:32:051
2984199280,27cyclictest0-21swapper/109:02:111
2983699280,8cyclictest0-21swapper/009:35:180
2983699280,2cyclictest0-21swapper/010:14:570
2983699280,20cyclictest0-21swapper/012:35:570
29843992723,3cyclictest0-21swapper/209:20:052
2984199270,26cyclictest0-21swapper/109:26:511
2984199270,26cyclictest0-21swapper/109:15:431
2983699276,15cyclictest0-21swapper/009:17:470
29836992719,7cyclictest743-21snmpd07:18:190
2983699270,15cyclictest0-21swapper/010:06:260
29843992622,3cyclictest0-21swapper/209:09:582
2984199266,18cyclictest0-21swapper/109:12:081
2984199260,25cyclictest8447-21sh09:52:211
2984199260,25cyclictest0-21swapper/112:16:021
2984199260,25cyclictest0-21swapper/111:56:151
2984199260,25cyclictest0-21swapper/111:50:461
2984199260,25cyclictest0-21swapper/111:37:591
2984199260,25cyclictest0-21swapper/111:14:571
2984199260,25cyclictest0-21swapper/110:49:181
2984199260,25cyclictest0-21swapper/109:57:591
2984199260,24cyclictest0-21swapper/111:09:161
2983699267,18cyclictest0-21swapper/010:21:430
29836992617,6cyclictest743-21snmpd11:48:470
2983699260,2cyclictest0-21swapper/010:25:590
2983699260,25cyclictest0-21swapper/010:31:110
2983699260,22cyclictest0-21swapper/009:50:130
2984399250,24cyclictest0-21swapper/211:24:552
2984399250,23cyclictest29019-21ssh10:18:452
2984399250,20cyclictest0-21swapper/212:35:062
29841992522,2cyclictest0-21swapper/107:35:261
2984199250,24cyclictest0-21swapper/112:26:111
2984199250,24cyclictest0-21swapper/112:21:221
2984199250,24cyclictest0-21swapper/109:23:441
2984199250,24cyclictest0-21swapper/108:05:021
2984199250,24cyclictest0-21swapper/107:29:101
2984199250,24cyclictest0-21swapper/107:18:431
29836992518,6cyclictest743-21snmpd08:29:470
29836992518,6cyclictest743-21snmpd07:57:440
29836992517,5cyclictest743-21snmpd11:39:070
29836992516,8cyclictest0-21swapper/011:34:170
29836992516,8cyclictest0-21swapper/011:09:020
29836992516,8cyclictest0-21swapper/010:00:000
29836992516,6cyclictest743-21snmpd12:14:260
29836992516,6cyclictest743-21snmpd12:14:250
2983699250,24cyclictest0-21swapper/011:04:420
2983699250,24cyclictest0-21swapper/009:22:530
2983699250,24cyclictest0-21swapper/009:13:320
2983699250,21cyclictest0-21swapper/012:27:460
2983699250,20cyclictest0-21swapper/009:33:230
2984399242,21cyclictest0-21swapper/212:01:342
29843992420,3cyclictest0-21swapper/211:49:172
2984199248,15cyclictest0-21swapper/110:50:371
29841992421,3cyclictest0-21swapper/111:43:041
29841992420,3cyclictest0-21swapper/107:46:141
29841992415,8cyclictest0-21swapper/109:33:541
2984199240,23cyclictest0-21swapper/112:11:531
2984199240,23cyclictest0-21swapper/112:11:521
2984199240,23cyclictest0-21swapper/112:07:591
2984199240,23cyclictest0-21swapper/108:38:581
2983699247,8cyclictest0-21swapper/011:16:510
2983699243,13cyclictest10207-21ssh11:27:500
2983699242,14cyclictest0-21swapper/010:17:320
29836992416,7cyclictest743-21snmpd07:33:590
29836992416,7cyclictest743-21snmpd07:28:520
2983699240,5cyclictest0-21swapper/009:40:280
2983699240,23cyclictest0-21swapper/012:20:060
2983699240,13cyclictest0-21swapper/010:45:400
2983699240,13cyclictest0-21swapper/009:55:560
29843992321,2cyclictest0-21swapper/209:40:092
29843992319,3cyclictest0-21swapper/210:59:492
2984399230,22cyclictest0-21swapper/210:21:202
2984399230,22cyclictest0-21swapper/209:56:582
29841992314,8cyclictest0-21swapper/109:41:581
2984199230,22cyclictest0-21swapper/111:00:391
2984199230,22cyclictest0-21swapper/110:35:331
2984199230,22cyclictest0-21swapper/110:16:161
2984199230,22cyclictest0-21swapper/110:11:531
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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