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2025-07-12 - 14:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot4.osadl.org (updated Sat Jul 12, 2025 12:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22534215993,63sleep20-21swapper/207:09:542
22420211299,8sleep30-21swapper/307:08:283
22479210999,7sleep00-21swapper/007:09:120
2222428977,8sleep10-21swapper/107:05:521
279292800,0sleep20-21swapper/211:20:232
136132740,0sleep20-21swapper/207:25:192
206682700,0sleep020673-21unixbench_multi11:30:300
220962640,0sleep20-21swapper/207:30:292
14132630,0sleep00-21swapper/007:40:240
120222590,1sleep338-21rcuc/310:05:203
72312580,1sleep010-21rcuc/011:54:570
234112580,4sleep22271799cyclictest09:18:292
195402570,1sleep30-21swapper/310:10:143
147422530,0sleep20-21swapper/211:56:352
2271799291,27cyclictest0-21swapper/208:46:372
2271799280,27cyclictest0-21swapper/211:45:092
2271799280,27cyclictest0-21swapper/210:20:442
2271399280,27cyclictest0-21swapper/107:26:231
2271399280,17cyclictest0-21swapper/109:52:201
2270899280,27cyclictest0-21swapper/010:53:200
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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