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2022-10-04 - 09:35

x86 Intel Core i7-E610 @2530 MHz, Linux 4.9.271-rt182 (Profile)

Latency plot of system in rack #5, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a -t3 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot4.osadl.org (updated Tue Oct 04, 2022 00:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
23787213170,7sleep30-21swapper/319:06:173
238982115103,7sleep00-21swapper/019:07:430
23971211272,8sleep10-21swapper/119:08:391
18521210797,7sleep20-21swapper/219:05:072
68812620,1sleep00-21swapper/022:50:340
255692600,0sleep00-21swapper/019:35:250
162682590,0sleep00-21swapper/021:15:170
146582590,0sleep30-21swapper/322:20:333
163372580,0sleep00-21swapper/023:30:240
32462570,0sleep20-21swapper/220:10:232
126992570,0sleep20-21swapper/220:45:232
306462540,0sleep20-21swapper/219:15:002
2425299295,17cyclictest21106-21/usr/sbin/munin20:55:262
2424799280,27cyclictest0-21swapper/121:46:441
255692270,0sleep20-21swapper/200:10:272
2425299270,26cyclictest0-21swapper/223:06:482
2425299270,26cyclictest0-21swapper/222:05:262
24247992712,14cyclictest0-21swapper/122:43:271
2424799270,25cyclictest12676-21munin-run22:05:001
2425299260,26cyclictest0-21swapper/219:39:232
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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