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2019-07-22 - 08:08

Intel(R) Core(TM) i7 CPU E 610 @ 2.53GHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #5, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot4.osadl.org (updated Mon Jul 22, 2019 00:44:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
704858760,12alsa-sink0-21swapper/210:06:072
704958061,6alsa-source0-21swapper/310:06:083
789117766,7sleep0-21swapper/010:06:180
815917058,7sleep0-21swapper/110:06:231
2514199350,18cyclictest0-21swapper/219:20:352
2514199350,17cyclictest0-21swapper/219:35:032
2514199342,31cyclictest0-21swapper/220:35:032
2514199340,17cyclictest3812-21copy20:50:042
2514199340,17cyclictest0-21swapper/222:05:042
2514199340,17cyclictest0-21swapper/222:05:032
2514199340,17cyclictest0-21swapper/221:35:352
2514099340,16cyclictest0-21swapper/120:50:201
2514199320,16cyclictest0-21swapper/221:55:012
2513999320,8cyclictest212550irq/25-eth021:05:090
2514199310,15cyclictest10806-21diskstats21:05:042
2514299301,18cyclictest0-21swapper/323:15:353
2514299301,17cyclictest0-21swapper/321:50:033
2514299300,19cyclictest0-21swapper/323:45:363
2514299300,18cyclictest0-21swapper/300:05:043
2514299300,17cyclictest29500-21copy19:20:033
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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