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2025-02-08 - 17:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot4.osadl.org (updated Sat Feb 08, 2025 12:44:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19811214583,6sleep10-21swapper/107:09:241
197162111101,7sleep30-21swapper/307:08:093
19661210898,7sleep00-21swapper/007:07:270
14274210797,7sleep20-21swapper/207:05:072
139212760,1sleep30-21swapper/309:18:333
204912690,0sleep20-21swapper/210:40:362
264192640,0sleep226423-21tr08:40:152
234742640,1sleep229-21rcuc/211:40:002
315552600,0sleep30-21swapper/311:28:593
44552590,0sleep20-21swapper/211:30:152
2003499280,27cyclictest0-21swapper/207:39:002
20029992814,13cyclictest0-21swapper/107:45:111
2002999280,27cyclictest0-21swapper/108:44:281
2002599280,27cyclictest0-21swapper/011:06:420
20034992723,3cyclictest0-21swapper/211:21:362
2003499270,26cyclictest0-21swapper/207:10:372
2002999270,26cyclictest0-21swapper/107:21:371
2002599270,26cyclictest0-21swapper/008:52:280
2002599270,25cyclictest28845-21munin-run12:15:000
20034992618,7cyclictest0-21swapper/209:14:432
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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