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2023-01-27 - 15:06

x86 Intel Xeon E5-2650Lv2 @1700 MHz, Linux 4.18.7-rt5 (Profile)

Latency plot of system in rack #6, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Up99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100, Linux 4.9.20-rt16, x86_64 highest latencies:
System rack6slot0.osadl.org (updated Sat Jan 21, 2023 02:59:15)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10846992360,231cyclictest0-21swapper/3921:39:0433
10846992360,231cyclictest0-21swapper/3921:39:0433
10846992360,231cyclictest0-21swapper/3921:39:0433
10846992313,110cyclictest142850irq/47-eno1-TxR22:10:2633
10846992313,110cyclictest142850irq/47-eno1-TxR22:10:2533
10846992280,223cyclictest0-21swapper/3922:18:0433
10846992280,223cyclictest0-21swapper/3922:18:0333
1083899228224,2cyclictest0-21swapper/3300:12:0327
1083899228224,2cyclictest0-21swapper/3300:12:0227
10846992271,218cyclictest1368-21dbus-daemon22:22:5333
10846992271,218cyclictest1368-21dbus-daemon22:22:5233
10846992260,98cyclictest0-21swapper/3919:55:1533
10846992260,98cyclictest0-21swapper/3919:55:1433
10816992250,4cyclictest11143-2110-uname00:11:468
10816992250,4cyclictest11143-2110-uname00:11:468
10846992241,218cyclictest0-21swapper/3923:40:1633
10846992241,218cyclictest0-21swapper/3923:40:1533
1084599222207,13cyclictest0-21swapper/3821:44:2332
1084599222207,13cyclictest0-21swapper/3821:44:2332
1084599222207,13cyclictest0-21swapper/3821:44:2232
10846992211,110cyclictest0-21swapper/3922:05:2033
10846992211,110cyclictest0-21swapper/3922:05:2033
10846992210,219cyclictest0-21swapper/3922:45:2533
10846992210,219cyclictest0-21swapper/3922:45:2533
10846992210,216cyclictest0-21swapper/3900:10:3333
10846992210,216cyclictest0-21swapper/3900:10:3333
10846992191,215cyclictest0-21swapper/3919:21:3833
10846992191,215cyclictest0-21swapper/3919:21:3733
10846992190,185cyclictest0-21swapper/3921:50:5333
10846992190,185cyclictest0-21swapper/3921:50:5233
10846992180,213cyclictest142850irq/47-eno1-TxR19:10:2533
10846992180,213cyclictest142850irq/47-eno1-TxR19:10:2533
10846992171,211cyclictest0-21swapper/3923:30:0133
10846992171,211cyclictest0-21swapper/3923:30:0033
10846992170,213cyclictest0-21swapper/3900:15:0833
10846992170,213cyclictest0-21swapper/3900:15:0833
1084599217202,9cyclictest0-21swapper/3800:25:2032
1084599217202,9cyclictest0-21swapper/3800:25:2032
10846992160,62cyclictest0-21swapper/3923:48:2433
10846992160,62cyclictest0-21swapper/3923:48:2333
1084599216206,6cyclictest12943-21CPU32
1084599216206,6cyclictest12943-21CPU32
1084599216206,6cyclictest12943-21CPU32
1084599216195,18cyclictest0-21swapper/3800:05:0132
1084599216195,18cyclictest0-21swapper/3800:05:0132
1084599216195,18cyclictest0-21swapper/3800:05:0032
1084599214207,4cyclictest1368-21dbus-daemon23:40:1432
1084599214207,4cyclictest1368-21dbus-daemon23:40:1432
1084599214193,16cyclictest18483-21qemu-system-x8621:15:3132
1084599214193,16cyclictest18483-21qemu-system-x8621:15:3132
1084599214193,16cyclictest18483-21qemu-system-x8621:15:3132
10827992140,211cyclictest26762-21sshd22:07:5417
10827992140,211cyclictest26762-21sshd22:07:5417
10846992131,117cyclictest0-21swapper/3922:05:0233
10846992131,117cyclictest0-21swapper/3922:05:0233
10846992131,117cyclictest0-21swapper/3922:05:0233
10846992130,210cyclictest0-21swapper/3923:30:1633
10846992130,210cyclictest0-21swapper/3923:30:1533
10846992130,210cyclictest0-21swapper/3923:30:1533
10846992120,122cyclictest0-21swapper/3922:28:0333
10846992120,122cyclictest0-21swapper/3922:28:0333
10823992121,112cyclictest0-21swapper/2221:45:1715
10823992121,112cyclictest0-21swapper/2221:45:1615
10823992121,112cyclictest0-21swapper/2221:45:1615
10816992121,4cyclictest0-21swapper/1619:35:238
10846992110,208cyclictest0-21swapper/3920:39:5233
10846992110,208cyclictest0-21swapper/3920:39:5233
1084599211202,6cyclictest0-21swapper/3819:45:0032
1084599211202,6cyclictest0-21swapper/3819:45:0032
1084599211197,11cyclictest0-21swapper/3823:51:3132
1084599211197,11cyclictest0-21swapper/3823:51:3132
1084599211197,11cyclictest0-21swapper/3823:51:3032
1084599211194,12cyclictest0-21swapper/3822:35:4232
1084599211194,12cyclictest0-21swapper/3822:35:4232
1084599211194,12cyclictest0-21swapper/3822:35:4132
1084599211188,17cyclictest0-21swapper/3821:35:2832
1084599211188,17cyclictest0-21swapper/3821:35:2832
1084599211188,17cyclictest0-21swapper/3821:35:2732
10846992101,205cyclictest0-21swapper/3900:10:0233
10846992101,205cyclictest0-21swapper/3900:10:0233
10823992101,153cyclictest0-21swapper/2222:20:1915
10823992101,153cyclictest0-21swapper/2222:20:1915
10846992091,205cyclictest0-21swapper/3922:35:1633
10846992091,205cyclictest0-21swapper/3922:35:1633
10846992091,205cyclictest0-21swapper/3922:35:1533
10846992090,206cyclictest1993-21nfsd23:15:1733
10846992090,206cyclictest1993-21nfsd23:15:1733
1084599209203,4cyclictest0-21swapper/3800:10:5832
1084599209203,4cyclictest0-21swapper/3800:10:5732
1084599209201,5cyclictest0-21swapper/3822:20:0132
1084599209201,5cyclictest0-21swapper/3822:20:0132
1084599209196,11cyclictest0-21swapper/3823:45:3032
1084599209196,11cyclictest0-21swapper/3823:45:3032
10816992091,2cyclictest0-21swapper/1621:50:228
10816992091,2cyclictest0-21swapper/1621:50:218
10846992080,205cyclictest0-21swapper/3921:43:4233
10846992080,205cyclictest0-21swapper/3921:43:4233
10846992080,205cyclictest0-21swapper/3921:43:4133
10846992080,203cyclictest0-21swapper/3919:43:5133
10846992080,203cyclictest0-21swapper/3919:43:5133
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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