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2024-05-23 - 20:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot0.osadl.org (updated Thu May 23, 2024 13:01:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4065499251246,3cyclictest0-21swapper/1509:05:147
4065499251246,3cyclictest0-21swapper/1509:05:147
40665992364,220cyclictest1989-21nfsd10:30:1918
40665992364,220cyclictest1989-21nfsd10:30:1918
40665992364,220cyclictest1989-21nfsd10:30:1918
4061999223216,2cyclictest0-21swapper/307:50:0123
40630992119,192cyclictest1293-21jbd2/sdb1-810:55:212
40630992119,192cyclictest1293-21jbd2/sdb1-810:55:212
4066999202182,11cyclictest0-21swapper/2812:40:0621
4066999202182,11cyclictest0-21swapper/2812:40:0621
40663992011,189cyclictest1526-21dbus-daemon09:47:5816
40663992011,189cyclictest1526-21dbus-daemon09:47:5716
40663992011,189cyclictest1526-21dbus-daemon09:47:5716
4061999201146,51cyclictest4634-21CPU23
4061999201146,51cyclictest4634-21CPU23
406659920027,166cyclictest0-21swapper/2512:25:3018
406659920027,166cyclictest0-21swapper/2512:25:2918
406659919324,166cyclictest24255-21sshd09:40:1618
406659919324,166cyclictest24255-21sshd09:40:1618
4065499193188,3cyclictest0-21swapper/1510:50:167
4065499193188,3cyclictest0-21swapper/1510:50:167
4065499193188,3cyclictest0-21swapper/1510:50:167
4061999192147,36cyclictest0-21swapper/309:42:1023
4061999192147,36cyclictest0-21swapper/309:42:1023
406659919125,163cyclictest0-21swapper/2512:20:1718
406659919125,163cyclictest0-21swapper/2512:20:1718
406659919125,163cyclictest0-21swapper/2512:20:1718
4066399191156,33cyclictest0-21swapper/2309:34:1116
4066399191156,33cyclictest0-21swapper/2309:34:1116
4066399191156,33cyclictest0-21swapper/2309:34:1116
40630991911,179cyclictest38583-21rm10:47:172
40630991911,179cyclictest38583-21rm10:47:172
406659918926,159cyclictest0-21swapper/2512:02:2218
406659918926,159cyclictest0-21swapper/2512:02:2218
4061999189174,12cyclictest0-21swapper/309:52:4623
4061999189174,12cyclictest0-21swapper/309:52:4623
4061999189174,12cyclictest0-21swapper/309:52:4623
4061999189153,26cyclictest0-21swapper/310:59:2723
4061999189153,26cyclictest0-21swapper/310:59:2723
406179918915,8cyclictest31458-21NetworkChangeNo11:10:191
406179918915,8cyclictest31458-21NetworkChangeNo11:10:191
406179918915,8cyclictest31458-21NetworkChangeNo11:10:191
4067699188129,51cyclictest0-21swapper/3410:48:5128
4067699188129,51cyclictest0-21swapper/3410:48:5128
406659918817,166cyclictest0-21swapper/2511:05:2318
406659918817,166cyclictest0-21swapper/2511:05:2218
406659918817,166cyclictest0-21swapper/2511:05:2218
4066799186176,5cyclictest9327-21CPU20
4066799186176,5cyclictest9327-21CPU20
4066799186176,5cyclictest9327-21CPU20
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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