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2022-07-03 - 04:45

x86 Intel T1300 @1667 MHz, Linux 4.16.15-rt7 (Profile)

Latency plot of system in rack #6, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot2.osadl.org (updated Sun Jul 03, 2022 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
241222630,1sleep00-21swapper/019:38:280
21632620,1sleep1221ktimersoftd/122:03:251
266562590,0sleep00-21swapper/021:38:190
37452550,0sleep00-21swapper/023:58:240
142422468,8sleep00-21swapper/019:07:050
14407993931,7cyclictest248850irq/16-enp2s0f000:28:240
130522399,8sleep10-21swapper/119:03:111
14408993635,0cyclictest248850irq/16-enp2s0f020:03:231
14408993634,1cyclictest248850irq/16-enp2s0f019:35:021
14408993534,0cyclictest248850irq/16-enp2s0f000:04:231
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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