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2019-07-17 - 03:14

Intel(R) Pentium(R) CPU 2020M @ 2.40GHz, Linux 4.16.15-rt7 (Profile)

Latency plot of system in rack #6, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack6slot2.osadl.org (updated Mon Jul 15, 2019 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1043124915,8sleep00-21swapper/019:04:100
1050124413,10sleep10-21swapper/119:04:531
1092199127,2cyclictest29588-22iostat_ios21:58:341
1092199127,2cyclictest2713-21latency_hist00:08:281
1092199127,1cyclictest19588-22users21:24:011
1092199121,8cyclictest0-21swapper/120:58:371
1092199120,9cyclictest0-21swapper/120:33:301
1092199120,8cyclictest28722-21ln20:08:281
1092199120,8cyclictest14381-21munin-run22:58:281
1092199120,8cyclictest10413-22perl22:43:331
1092199120,8cyclictest0-21swapper/100:28:311
1092199117,1cyclictest24755-22fschecks_time19:53:331
1092199117,1cyclictest15856-22cstates21:13:311
1092199117,1cyclictest0-21swapper/122:08:331
1092199117,1cyclictest0-21swapper/100:18:411
1092199116,2cyclictest5385-22/usr/sbin/munin20:38:411
1092199116,1cyclictest12707-22df19:13:311
1092199111,8cyclictest0-21swapper/123:58:301
1092199110,9cyclictest3485-22users22:18:431
1092199110,9cyclictest30609-22/usr/sbin/munin22:03:321
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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