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2024-10-07 - 01:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack6slot2.osadl.org (updated Sun Oct 06, 2024 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3642630,1sleep10-21swapper/110:23:251
93802580,0sleep00-21swapper/010:53:260
318472580,0sleep1221ktimersoftd/112:08:251
235452510,0sleep10-21swapper/111:43:081
235452510,0sleep10-21swapper/111:43:081
66442468,8sleep00-21swapper/007:07:090
67272428,8sleep10-21swapper/107:08:001
6802993732,4cyclictest168550irq/16-i91510:53:291
6802993731,5cyclictest168550irq/16-i91512:03:201
6802993634,1cyclictest255950irq/16-enp2s0f007:43:201
6802993633,2cyclictest168550irq/16-i91511:43:151
6802993632,3cyclictest255950irq/16-enp2s0f011:25:031
6802993632,3cyclictest168550irq/16-i91512:22:191
6802993632,3cyclictest168550irq/16-i91511:15:211
6802993632,3cyclictest168550irq/16-i91509:49:421
6802993632,3cyclictest168550irq/16-i91509:29:141
6802993632,3cyclictest168550irq/16-i91508:26:321
6802993631,4cyclictest255950irq/16-enp2s0f012:25:111
6802993631,4cyclictest255950irq/16-enp2s0f009:19:441
6802993631,4cyclictest168550irq/16-i91508:44:391
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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