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2024-07-21 - 06:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot2.osadl.org (updated Sun Jul 21, 2024 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1749924818,22sleep00-21swapper/019:09:000
17615993727,9cyclictest255950irq/16-enp2s0f023:09:460
171912379,21sleep10-21swapper/119:05:511
17616993533,0cyclictest221ktimersoftd/100:17:521
17615993534,0cyclictest255950irq/16-enp2s0f000:02:400
17615993433,0cyclictest255950irq/16-enp2s0f023:42:440
17615993433,0cyclictest255950irq/16-enp2s0f021:34:500
17615993433,0cyclictest255950irq/16-enp2s0f021:12:520
17615993433,0cyclictest255950irq/16-enp2s0f019:43:490
17615993432,1cyclictest255950irq/16-enp2s0f023:19:520
17615993432,1cyclictest255950irq/16-enp2s0f023:07:060
17615993432,1cyclictest255950irq/16-enp2s0f022:59:440
17615993432,1cyclictest255950irq/16-enp2s0f022:39:480
17615993432,1cyclictest255950irq/16-enp2s0f022:34:490
17615993432,1cyclictest255950irq/16-enp2s0f022:25:150
17615993432,1cyclictest255950irq/16-enp2s0f022:19:450
17615993432,1cyclictest255950irq/16-enp2s0f022:03:390
17615993432,1cyclictest255950irq/16-enp2s0f021:44:550
17615993432,1cyclictest255950irq/16-enp2s0f021:05:210
17615993432,1cyclictest255950irq/16-enp2s0f020:14:470
17615993432,1cyclictest255950irq/16-enp2s0f019:44:480
17615993432,1cyclictest255950irq/16-enp2s0f019:24:450
17615993432,1cyclictest255950irq/16-enp2s0f000:29:520
17615993432,1cyclictest255950irq/16-enp2s0f000:28:330
17615993431,2cyclictest255950irq/16-enp2s0f022:14:520
17616993332,0cyclictest255950irq/16-enp2s0f023:49:501
17616993332,0cyclictest255950irq/16-enp2s0f023:09:571
17616993332,0cyclictest255950irq/16-enp2s0f021:53:241
17616993332,0cyclictest255950irq/16-enp2s0f020:19:481
17615993333,0cyclictest255950irq/16-enp2s0f023:34:510
17615993332,0cyclictest255950irq/16-enp2s0f023:54:470
17615993332,0cyclictest255950irq/16-enp2s0f023:51:070
17615993332,0cyclictest255950irq/16-enp2s0f023:14:500
17615993332,0cyclictest255950irq/16-enp2s0f022:54:390
17615993332,0cyclictest255950irq/16-enp2s0f022:52:390
17615993332,0cyclictest255950irq/16-enp2s0f022:11:390
17615993332,0cyclictest255950irq/16-enp2s0f021:50:430
17615993332,0cyclictest255950irq/16-enp2s0f021:39:390
17615993332,0cyclictest255950irq/16-enp2s0f021:16:200
17615993332,0cyclictest255950irq/16-enp2s0f021:00:510
17615993332,0cyclictest255950irq/16-enp2s0f020:54:480
17615993332,0cyclictest255950irq/16-enp2s0f020:50:020
17615993332,0cyclictest255950irq/16-enp2s0f020:39:510
17615993332,0cyclictest255950irq/16-enp2s0f020:35:040
17615993332,0cyclictest255950irq/16-enp2s0f020:09:500
17615993332,0cyclictest255950irq/16-enp2s0f020:04:550
17615993332,0cyclictest255950irq/16-enp2s0f019:13:390
17615993332,0cyclictest255950irq/16-enp2s0f000:38:500
17615993332,0cyclictest255950irq/16-enp2s0f000:05:580
17615993331,1cyclictest255950irq/16-enp2s0f023:44:530
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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