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2021-06-17 - 20:29

Intel(R) Core(TM) i7-3632QM CPU @ 2.20GHz, Linux 4.19.1-rt3 (Profile)

Latency plot of system in rack #6, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot3.osadl.org (updated Thu Jun 17, 2021 12:46:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3268926733,0sleep70-21swapper/707:07:447
36326632,0sleep10-21swapper/107:09:471
3271326633,0sleep40-21swapper/407:08:054
3245125933,0sleep30-21swapper/307:05:323
3256725827,0sleep20-21swapper/207:06:042
33825640,0sleep50-21swapper/507:09:285
33025438,0sleep60-21swapper/607:09:206
3083325336,0sleep00-21swapper/007:05:050
711330,0ktimersoftd/70-21swapper/710:42:397
551330,0ktimersoftd/50-21swapper/510:29:335
391330,0ktimersoftd/30-21swapper/311:13:503
231330,0ktimersoftd/10-21swapper/110:42:391
774993231,0cyclictest38-21rcuc/308:00:313
711320,0ktimersoftd/70-21swapper/710:17:257
631320,0ktimersoftd/60-21swapper/610:42:386
391320,0ktimersoftd/320915-21ssh11:00:393
391320,0ktimersoftd/317087-21ssh12:17:093
391320,0ktimersoftd/30-21swapper/312:36:063
391320,0ktimersoftd/30-21swapper/312:29:403
391320,0ktimersoftd/30-21swapper/312:21:533
391320,0ktimersoftd/30-21swapper/312:14:473
391320,0ktimersoftd/30-21swapper/312:08:263
391320,0ktimersoftd/30-21swapper/311:49:283
391320,0ktimersoftd/30-21swapper/311:42:463
391320,0ktimersoftd/30-21swapper/311:05:263
391320,0ktimersoftd/30-21swapper/311:05:263
391320,0ktimersoftd/30-21swapper/310:57:093
391320,0ktimersoftd/30-21swapper/310:45:153
391320,0ktimersoftd/30-21swapper/310:34:503
391320,0ktimersoftd/30-21swapper/310:28:033
391320,0ktimersoftd/30-21swapper/310:23:373
391320,0ktimersoftd/30-21swapper/310:10:183
391320,0ktimersoftd/30-21swapper/310:05:543
391320,0ktimersoftd/30-21swapper/309:55:023
391320,0ktimersoftd/30-21swapper/309:53:023
391320,0ktimersoftd/30-21swapper/309:36:543
391320,0ktimersoftd/30-21swapper/309:10:093
391320,0ktimersoftd/30-21swapper/309:01:353
391320,0ktimersoftd/30-21swapper/308:37:133
391320,0ktimersoftd/30-21swapper/308:37:133
391320,0ktimersoftd/30-21swapper/308:25:013
391320,0ktimersoftd/30-21swapper/308:24:263
391320,0ktimersoftd/30-21swapper/307:30:123
391320,0ktimersoftd/30-21swapper/307:28:283
391320,0ktimersoftd/30-21swapper/307:21:293
391320,0ktimersoftd/30-21swapper/307:10:153
231320,0ktimersoftd/10-21swapper/109:58:021
101320,0ktimersoftd/00-21swapper/011:46:290
101320,0ktimersoftd/00-21swapper/010:42:380
774993130,0cyclictest38-21rcuc/310:35:173
391310,0ktimersoftd/30-21swapper/309:08:183
391310,0ktimersoftd/30-21swapper/307:35:303
774993030,0cyclictest0-21swapper/308:30:253
774993030,0cyclictest0-21swapper/308:05:233
774993029,0cyclictest40-21ksoftirqd/311:37:123
774993029,0cyclictest40-21ksoftirqd/309:25:003
774993029,0cyclictest38-21rcuc/309:17:023
774993029,0cyclictest0-21swapper/310:52:183
774993029,0cyclictest0-21swapper/310:52:183
774993029,0cyclictest0-21swapper/309:43:373
774993029,0cyclictest0-21swapper/308:54:303
774993029,0cyclictest0-21swapper/308:54:303
774993028,0cyclictest40-21ksoftirqd/309:30:263
774993027,0cyclictest38-21rcuc/311:20:213
774993027,0cyclictest38-21rcuc/311:20:213
774993027,0cyclictest0-21swapper/311:55:213
774992928,0cyclictest40-21ksoftirqd/308:10:243
774992928,0cyclictest38-21rcuc/311:53:573
774992928,0cyclictest38-21rcuc/311:16:373
774992928,0cyclictest38-21rcuc/310:43:023
774992928,0cyclictest38-21rcuc/310:15:163
774992928,0cyclictest38-21rcuc/307:50:153
774992928,0cyclictest0-21swapper/312:30:203
774992928,0cyclictest0-21swapper/311:31:103
774992928,0cyclictest0-21swapper/311:27:143
774992928,0cyclictest0-21swapper/308:40:233
774992928,0cyclictest0-21swapper/307:45:253
774992927,0cyclictest0-21swapper/307:19:453
774992926,0cyclictest40-21ksoftirqd/308:55:083
774992926,0cyclictest0-21swapper/307:59:423
774992922,0cyclictest40-21ksoftirqd/312:00:063
774992828,0cyclictest0-21swapper/309:45:123
774992828,0cyclictest0-21swapper/307:40:203
774992827,0cyclictest40-21ksoftirqd/308:15:123
774992827,0cyclictest0-21swapper/308:45:123
774992826,0cyclictest0-21swapper/310:04:393
774992825,0cyclictest0-21swapper/309:20:313
762992424,0cyclictest0-21swapper/112:34:281
762992424,0cyclictest0-21swapper/112:17:511
762992424,0cyclictest0-21swapper/110:49:051
762992424,0cyclictest0-21swapper/110:31:211
762992424,0cyclictest0-21swapper/110:15:491
762992424,0cyclictest0-21swapper/110:13:351
762992424,0cyclictest0-21swapper/108:32:051
762992424,0cyclictest0-21swapper/108:12:411
762992424,0cyclictest0-21swapper/107:54:551
762992424,0cyclictest0-21swapper/107:38:511
762992424,0cyclictest0-21swapper/107:21:051
762992323,0cyclictest0-21swapper/111:42:211
762992323,0cyclictest0-21swapper/109:05:551
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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