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2022-09-25 - 14:18
/usr/bin/Xorg /usr/bin/Xorg

x86 Intel Core i7-3632QM @2200 MHz, Linux 4.19.1-rt3 (Profile)

Latency plot of system in rack #6, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot3.osadl.org (updated Sun Sep 25, 2022 00:46:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1284926731,0sleep10-21swapper/119:08:271
1281426044,0sleep50-21swapper/519:07:595
1264125841,0sleep30-21swapper/319:05:323
1282625639,0sleep60-21swapper/619:08:086
1276925640,0sleep70-21swapper/719:07:217
1290425336,0sleep00-21swapper/019:09:140
1287025235,0sleep20-21swapper/219:08:442
1265325134,0sleep40-21swapper/419:05:414
1338999380,0cyclictest14044-21sed22:35:007
1338999380,0cyclictest0-21swapper/723:32:327
1338999370,0cyclictest0-21swapper/700:33:257
1338999360,0cyclictest0-21swapper/723:57:117
1338999360,0cyclictest0-21swapper/721:31:027
391340,0ktimersoftd/30-21swapper/322:41:363
391340,0ktimersoftd/30-21swapper/321:06:203
391340,0ktimersoftd/30-21swapper/300:33:253
631330,0ktimersoftd/60-21swapper/623:32:316
391330,0ktimersoftd/30-21swapper/300:23:433
101330,0ktimersoftd/00-21swapper/022:00:560
631320,0ktimersoftd/60-21swapper/622:35:006
471320,0ktimersoftd/40-21swapper/422:01:334
471320,0ktimersoftd/40-21swapper/421:28:354
391320,0ktimersoftd/38789-21ssh23:05:223
391320,0ktimersoftd/30-21swapper/323:57:373
391320,0ktimersoftd/30-21swapper/323:48:323
391320,0ktimersoftd/30-21swapper/323:40:583
391320,0ktimersoftd/30-21swapper/323:34:243
391320,0ktimersoftd/30-21swapper/323:26:073
391320,0ktimersoftd/30-21swapper/323:10:373
391320,0ktimersoftd/30-21swapper/323:01:083
391320,0ktimersoftd/30-21swapper/322:55:503
391320,0ktimersoftd/30-21swapper/322:54:173
391320,0ktimersoftd/30-21swapper/322:35:383
391320,0ktimersoftd/30-21swapper/322:27:513
391320,0ktimersoftd/30-21swapper/322:23:183
391320,0ktimersoftd/30-21swapper/322:14:593
391320,0ktimersoftd/30-21swapper/322:00:563
391320,0ktimersoftd/30-21swapper/321:56:263
391320,0ktimersoftd/30-21swapper/321:25:483
391320,0ktimersoftd/30-21swapper/321:00:573
391320,0ktimersoftd/30-21swapper/320:50:063
391320,0ktimersoftd/30-21swapper/320:48:173
391320,0ktimersoftd/30-21swapper/320:40:263
391320,0ktimersoftd/30-21swapper/320:30:243
391320,0ktimersoftd/30-21swapper/320:25:523
391320,0ktimersoftd/30-21swapper/320:09:413
391320,0ktimersoftd/30-21swapper/320:01:183
391320,0ktimersoftd/30-21swapper/319:55:353
391320,0ktimersoftd/30-21swapper/319:31:233
391320,0ktimersoftd/30-21swapper/319:18:253
391320,0ktimersoftd/30-21swapper/319:11:443
391320,0ktimersoftd/30-21swapper/300:38:553
391320,0ktimersoftd/30-21swapper/300:25:213
391320,0ktimersoftd/30-21swapper/300:19:213
391320,0ktimersoftd/30-21swapper/300:11:023
391320,0ktimersoftd/30-21swapper/300:05:253
391320,0ktimersoftd/30-21swapper/300:04:063
231320,0ktimersoftd/10-21swapper/123:57:111
231320,0ktimersoftd/10-21swapper/123:32:311
231320,0ktimersoftd/10-21swapper/123:12:451
231320,0ktimersoftd/10-21swapper/121:33:441
101320,0ktimersoftd/027085-21ssh21:33:440
391310,0ktimersoftd/30-21swapper/321:24:543
13360992222,0cyclictest311ktimersoftd/223:25:002
13347991919,0cyclictest18641-21kworker/0:123:04:140
13347991818,0cyclictest18641-21kworker/0:120:45:330
13347991817,0cyclictest18641-21kworker/0:123:55:140
13347991716,0cyclictest18641-21kworker/0:100:30:150
13347991615,0cyclictest18641-21kworker/0:121:55:590
13347991615,0cyclictest18641-21kworker/0:121:18:500
13347991615,0cyclictest18641-21kworker/0:121:03:180
13347991515,0cyclictest18641-21kworker/0:123:21:580
13347991515,0cyclictest0-21swapper/023:50:100
13347991514,0cyclictest18641-21kworker/0:123:37:300
13347991514,0cyclictest18641-21kworker/0:122:10:250
13347991514,0cyclictest18641-21kworker/0:121:54:530
13347991514,0cyclictest18641-21kworker/0:121:38:140
13347991514,0cyclictest18641-21kworker/0:121:21:030
13347991514,0cyclictest18641-21kworker/0:120:11:100
13347991514,0cyclictest18641-21kworker/0:119:53:580
13360991414,0cyclictest311ktimersoftd/221:30:002
13347991414,0cyclictest18641-21kworker/0:123:19:450
13347991414,0cyclictest18641-21kworker/0:123:05:190
13347991414,0cyclictest18641-21kworker/0:122:47:340
13347991413,0cyclictest18641-21kworker/0:120:40:080
13347991413,0cyclictest18641-21kworker/0:120:00:160
13347991413,0cyclictest18641-21kworker/0:119:19:350
13347991413,0cyclictest18641-21kworker/0:100:14:390
13347991412,0cyclictest18641-21kworker/0:122:58:490
1338999130,0cyclictest13799-21expr23:50:127
1338999130,0cyclictest0-21swapper/723:05:017
13347991313,0cyclictest18641-21kworker/0:122:30:230
13347991313,0cyclictest18641-21kworker/0:122:29:490
13347991313,0cyclictest18641-21kworker/0:120:27:150
13347991313,0cyclictest18641-21kworker/0:120:09:300
13347991312,0cyclictest18641-21kworker/0:123:31:190
13347991312,0cyclictest18641-21kworker/0:120:20:390
13347991312,0cyclictest18641-21kworker/0:100:29:050
13347991312,0cyclictest11-21rcuc/021:30:000
13347991312,0cyclictest11-21rcuc/020:38:310
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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